   1              	# 1 "../Project_Settings/Startup_Code/startup_MKL16Z4.S"
   1              	/* ---------------------------------------------------------------------------------------*/
   0              	
   2              	/*  @file:    startup_MKL16Z4.s                                                           */
   0              	
   3              	/*  @purpose: CMSIS Cortex-M0P Core Device Startup File                                   */
   4              	/*            MKL16Z4                                                                     */
   5              	/*  @version: 1.3                                                                         */
   6              	/*  @date:    2014-5-27                                                                   */
   7              	/*  @build:   b140606                                                                     */
   8              	/* ---------------------------------------------------------------------------------------*/
   9              	/*                                                                                        */
  10              	/* Copyright (c) 1997 - 2014 , Freescale Semiconductor, Inc.                              */
  11              	/* All rights reserved.                                                                   */
  12              	/*                                                                                        */
  13              	/* Redistribution and use in source and binary forms, with or without modification,       */
  14              	/* are permitted provided that the following conditions are met:                          */
  15              	/*                                                                                        */
  16              	/* o Redistributions of source code must retain the above copyright notice, this list     */
  17              	/*   of conditions and the following disclaimer.                                          */
  18              	/*                                                                                        */
  19              	/* o Redistributions in binary form must reproduce the above copyright notice, this       */
  20              	/*   list of conditions and the following disclaimer in the documentation and/or          */
  21              	/*   other materials provided with the distribution.                                      */
  22              	/*                                                                                        */
  23              	/* o Neither the name of Freescale Semiconductor, Inc. nor the names of its               */
  24              	/*   contributors may be used to endorse or promote products derived from this            */
  25              	/*   software without specific prior written permission.                                  */
  26              	/*                                                                                        */
  27              	/* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" AND        */
  28              	/* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED          */
  29              	/* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE                 */
  30              	/* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE FOR       */
  31              	/* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES         */
  32              	/* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;           */
  33              	/* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON         */
  34              	/* ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT                */
  35              	/* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS          */
  36              	/* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.                           */
  37              	/*****************************************************************************/
  38              	/* Version: GCC for ARM Embedded Processors                                  */
  39              	/*****************************************************************************/
  40              	    .syntax unified
  41              	    .arch armv6-m
  42              	
  43              	    .section .isr_vector, "a"
  44              	    .align 2
  45              	    .globl __isr_vector
  46              	__isr_vector:
  47 0000 00000000 	    .long   __StackTop                                      /* Top of Stack */
  48 0004 00000000 	    .long   Reset_Handler                                   /* Reset Handler */
  49 0008 00000000 	    .long   NMI_Handler                                     /* NMI Handler*/
  50 000c 00000000 	    .long   HardFault_Handler                               /* Hard Fault Handler*/
  51 0010 00000000 	    .long   0                                               /* Reserved*/
  52 0014 00000000 	    .long   0                                               /* Reserved*/
  53 0018 00000000 	    .long   0                                               /* Reserved*/
  54 001c 00000000 	    .long   0                                               /* Reserved*/
  55 0020 00000000 	    .long   0                                               /* Reserved*/
  56 0024 00000000 	    .long   0                                               /* Reserved*/
  57 0028 00000000 	    .long   0                                               /* Reserved*/
  58 002c 00000000 	    .long   SVC_Handler                                     /* SVCall Handler*/
  59 0030 00000000 	    .long   0                                               /* Reserved*/
  60 0034 00000000 	    .long   0                                               /* Reserved*/
  61 0038 00000000 	    .long   PendSV_Handler                                  /* PendSV Handler*/
  62 003c 00000000 	    .long   SysTick_Handler                                 /* SysTick Handler*/
  63              	
  64              	                                                            /* External Interrupts*/
  65 0040 00000000 	    .long   DMA0_IRQHandler                                 /* DMA channel 0 transfer complete and 
  66 0044 00000000 	    .long   DMA1_IRQHandler                                 /* DMA channel 1 transfer complete and 
  67 0048 00000000 	    .long   DMA2_IRQHandler                                 /* DMA channel 2 transfer complete and 
  68 004c 00000000 	    .long   DMA3_IRQHandler                                 /* DMA channel 3 transfer complete and 
  69 0050 00000000 	    .long   Reserved20_IRQHandler                           /* Reserved interrupt*/
  70 0054 00000000 	    .long   FTFA_IRQHandler                                 /* FTFA command complete and read colli
  71 0058 00000000 	    .long   LVD_LVW_IRQHandler                              /* Low-voltage detect, low-voltage warn
  72 005c 00000000 	    .long   LLW_IRQHandler                                  /* Low Leakage Wakeup*/
  73 0060 00000000 	    .long   I2C0_IRQHandler                                 /* I2C0 interrupt*/
  74 0064 00000000 	    .long   I2C1_IRQHandler                                 /* I2C1 interrupt*/
  75 0068 00000000 	    .long   SPI0_IRQHandler                                 /* SPI0 single interrupt vector for all
  76 006c 00000000 	    .long   SPI1_IRQHandler                                 /* SPI1 single interrupt vector for all
  77 0070 00000000 	    .long   UART0_IRQHandler                                /* UART0 status and error*/
  78 0074 00000000 	    .long   UART1_IRQHandler                                /* UART1 status and error*/
  79 0078 00000000 	    .long   UART2_IRQHandler                                /* UART2 status and error*/
  80 007c 00000000 	    .long   ADC0_IRQHandler                                 /* ADC0 interrupt*/
  81 0080 00000000 	    .long   CMP0_IRQHandler                                 /* CMP0 interrupt*/
  82 0084 00000000 	    .long   TPM0_IRQHandler                                 /* TPM0 single interrupt vector for all
  83 0088 00000000 	    .long   TPM1_IRQHandler                                 /* TPM1 single interrupt vector for all
  84 008c 00000000 	    .long   TPM2_IRQHandler                                 /* TPM2 single interrupt vector for all
  85 0090 00000000 	    .long   RTC_IRQHandler                                  /* RTC alarm interrupt*/
  86 0094 00000000 	    .long   RTC_Seconds_IRQHandler                          /* RTC seconds interrupt*/
  87 0098 00000000 	    .long   PIT_IRQHandler                                  /* PIT single interrupt vector for all 
  88 009c 00000000 	    .long   I2S0_IRQHandler                                 /* I2S0 Single interrupt vector for all
  89 00a0 00000000 	    .long   Reserved40_IRQHandler                           /* Reserved interrupt*/
  90 00a4 00000000 	    .long   DAC0_IRQHandler                                 /* DAC0 interrupt*/
  91 00a8 00000000 	    .long   TSI0_IRQHandler                                 /* TSI0 interrupt*/
  92 00ac 00000000 	    .long   MCG_IRQHandler                                  /* MCG interrupt*/
  93 00b0 00000000 	    .long   LPTimer_IRQHandler                              /* LPTMR0 interrupt*/
  94 00b4 00000000 	    .long   Reserved45_IRQHandler                           /* Reserved interrupt*/
  95 00b8 00000000 	    .long   PORTA_IRQHandler                                /* PORTA pin detect*/
  96 00bc 00000000 	    .long   PORTC_PORTD_IRQHandler                          /* Single interrupt vector for PORTC an
  97              	
  99              	
 100              	/* Flash Configuration */
 101              	    .section .FlashConfig, "a"
 102 0000 FFFFFFFF 	    .long 0xFFFFFFFF
 103 0004 FFFFFFFF 	    .long 0xFFFFFFFF
 104 0008 FFFFFFFF 	    .long 0xFFFFFFFF
 105 000c FEFFFFFF 	    .long 0xFFFFFFFE
 106              	
 107              	    .equ _NVIC_ICER,  0xE000E180
 108              	    .equ _NVIC_ICPR,  0xE000E280
 109              	    .text
 110              	    .thumb
 111              	
 112              	/* Reset Handler */
 113              	
 114              	    .thumb_func
 115              	    .align 2
 116              	    .globl   Reset_Handler
 118              	Reset_Handler:
 119 0000 72B6     	    cpsid   i               /* Mask interrupts */
 120 0002 0948     	    ldr r0, =_NVIC_ICER    /* Disable interrupts and clear pending flags */
 121 0004 0949     	    ldr r1, =_NVIC_ICPR
 122 0006 0A4A     	    ldr r2, =0xFFFFFFFF
 123 0008 0260     	    str r2, [r0]            /* NVIC_ICER - clear enable IRQ register */
 124 000a 0A60     	    str r2, [r1]            /* NVIC_ICPR - clear pending IRQ register */
 125              	#ifndef __NO_SYSTEM_INIT
 126 000c FFF7FEFF 	    bl SystemInit
 127              	#endif
 128 0010 62B6     	    cpsie   i               /* Unmask interrupts */
 129              	/*     Loop to copy data from read only memory to RAM. The ranges
 130              	 *      of copy from/to are specified by following symbols evaluated in
 131              	 *      linker script.
 132              	 *      __etext: End of code section, i.e., begin of data sections to copy from.
 133              	 *      __data_start__/__data_end__: RAM address range that data should be
 134              	 *      copied to. Both must be aligned to 4 bytes boundary.  */
 135              	
 136 0012 0849     	    ldr    r1, =__etext
 137 0014 084A     	    ldr    r2, =__data_start__
 138 0016 094B     	    ldr    r3, =__data_end__
 139              	
 140 0018 9B1A     	    subs    r3, r2
 141 001a 03DD     	    ble     .LC0
 142              	
 143              	.LC1:
 144 001c 043B     	    subs    r3, 4
 145 001e C858     	    ldr    r0, [r1,r3]
 146 0020 D050     	    str    r0, [r2,r3]
 147 0022 FBDC     	    bgt    .LC1
 148              	.LC0:
 149              	
 150              	#ifdef __STARTUP_CLEAR_BSS
 151              	/*     This part of work usually is done in C library startup code. Otherwise,
 152              	 *     define this macro to enable it in this startup.
 153              	 *
 154              	 *     Loop to zero out BSS section, which uses following symbols
 155              	 *     in linker script:
 156              	 *      __bss_start__: start of BSS section. Must align to 4
 157              	 *      __bss_end__: end of BSS section. Must align to 4
 158              	 */
 159              	    ldr r1, =__bss_start__
 160              	    ldr r2, =__bss_end__
 161              	
 162              	    subs    r2, r1
 163              	    ble .LC3
 164              	
 165              	    movs    r0, 0
 166              	.LC2:
 167              	    str r0, [r1, r2]
 168              	    subs    r2, 4
 169              	    bge .LC2
 170              	.LC3:
 171              	#endif
 172              	#ifndef __START
 173              	#define __START _start
 174              	#endif
 175 0024 FFF7FEFF 	    bl    __START
 176 0028 80E100E0 	    .pool
 176      80E200E0 
 176      FFFFFFFF 
 176      00000000 
 176      00000000 
 178              	
 179              	  .align	1
 180              	  .thumb_func
 181              	  .weak	Default_Handler
 183              	Default_Handler:
 184 0040 FEE7     	  b	.
 186              	
 187              	/*    Macro to define default handlers. Default handler
 188              	 *    will be weak symbol and just dead loops. They can be
 189              	 *    overwritten by other handlers */
 190              	  .macro	def_irq_handler	handler_name
 191              	  .weak	\handler_name
 192              	  .set	\handler_name, Default_Handler
 193              	  .endm
 194              	
 195              	/* Exception Handlers */
 196              	    def_irq_handler    NMI_Handler
 197              	    def_irq_handler    HardFault_Handler
 198              	    def_irq_handler    SVC_Handler
 199              	    def_irq_handler    PendSV_Handler
 200              	    def_irq_handler    SysTick_Handler
 201              	    def_irq_handler    DMA0_IRQHandler
 202              	    def_irq_handler    DMA1_IRQHandler
 203              	    def_irq_handler    DMA2_IRQHandler
 204              	    def_irq_handler    DMA3_IRQHandler
 205              	    def_irq_handler    Reserved20_IRQHandler
 206              	    def_irq_handler    FTFA_IRQHandler
 207              	    def_irq_handler    LVD_LVW_IRQHandler
 208              	    def_irq_handler    LLW_IRQHandler
 209              	    def_irq_handler    I2C0_IRQHandler
 210              	    def_irq_handler    I2C1_IRQHandler
 211              	    def_irq_handler    SPI0_IRQHandler
 212              	    def_irq_handler    SPI1_IRQHandler
 213              	    def_irq_handler    UART0_IRQHandler
 214              	    def_irq_handler    UART1_IRQHandler
 215              	    def_irq_handler    UART2_IRQHandler
 216              	    def_irq_handler    ADC0_IRQHandler
 217              	    def_irq_handler    CMP0_IRQHandler
 218              	    def_irq_handler    TPM0_IRQHandler
 219              	    def_irq_handler    TPM1_IRQHandler
 220              	    def_irq_handler    TPM2_IRQHandler
 221              	    def_irq_handler    RTC_IRQHandler
 222              	    def_irq_handler    RTC_Seconds_IRQHandler
 223              	    def_irq_handler    PIT_IRQHandler
 224              	    def_irq_handler    I2S0_IRQHandler
 225              	    def_irq_handler    Reserved40_IRQHandler
 226              	    def_irq_handler    DAC0_IRQHandler
 227              	    def_irq_handler    TSI0_IRQHandler
 228              	    def_irq_handler    MCG_IRQHandler
 229              	    def_irq_handler    LPTimer_IRQHandler
 230              	    def_irq_handler    Reserved45_IRQHandler
 231              	    def_irq_handler    PORTA_IRQHandler
 232              	    def_irq_handler    PORTC_PORTD_IRQHandler
 233              	    def_irq_handler    DefaultISR
 234              	
 235 0042 C046     	    .end
DEFINED SYMBOLS
../Project_Settings/Startup_Code/startup_MKL16Z4.S:44     .isr_vector:00000000 $d
../Project_Settings/Startup_Code/startup_MKL16Z4.S:46     .isr_vector:00000000 __isr_vector
../Project_Settings/Startup_Code/startup_MKL16Z4.S:118    .text:00000000 Reset_Handler
../Project_Settings/Startup_Code/startup_MKL16Z4.S:183    .text:00000040 NMI_Handler
../Project_Settings/Startup_Code/startup_MKL16Z4.S:183    .text:00000040 HardFault_Handler
../Project_Settings/Startup_Code/startup_MKL16Z4.S:183    .text:00000040 SVC_Handler
../Project_Settings/Startup_Code/startup_MKL16Z4.S:183    .text:00000040 PendSV_Handler
../Project_Settings/Startup_Code/startup_MKL16Z4.S:183    .text:00000040 SysTick_Handler
../Project_Settings/Startup_Code/startup_MKL16Z4.S:183    .text:00000040 DMA0_IRQHandler
../Project_Settings/Startup_Code/startup_MKL16Z4.S:183    .text:00000040 DMA1_IRQHandler
../Project_Settings/Startup_Code/startup_MKL16Z4.S:183    .text:00000040 DMA2_IRQHandler
../Project_Settings/Startup_Code/startup_MKL16Z4.S:183    .text:00000040 DMA3_IRQHandler
../Project_Settings/Startup_Code/startup_MKL16Z4.S:183    .text:00000040 Reserved20_IRQHandler
../Project_Settings/Startup_Code/startup_MKL16Z4.S:183    .text:00000040 FTFA_IRQHandler
../Project_Settings/Startup_Code/startup_MKL16Z4.S:183    .text:00000040 LVD_LVW_IRQHandler
../Project_Settings/Startup_Code/startup_MKL16Z4.S:183    .text:00000040 LLW_IRQHandler
../Project_Settings/Startup_Code/startup_MKL16Z4.S:183    .text:00000040 I2C0_IRQHandler
../Project_Settings/Startup_Code/startup_MKL16Z4.S:183    .text:00000040 I2C1_IRQHandler
../Project_Settings/Startup_Code/startup_MKL16Z4.S:183    .text:00000040 SPI0_IRQHandler
../Project_Settings/Startup_Code/startup_MKL16Z4.S:183    .text:00000040 SPI1_IRQHandler
../Project_Settings/Startup_Code/startup_MKL16Z4.S:183    .text:00000040 UART0_IRQHandler
../Project_Settings/Startup_Code/startup_MKL16Z4.S:183    .text:00000040 UART1_IRQHandler
../Project_Settings/Startup_Code/startup_MKL16Z4.S:183    .text:00000040 UART2_IRQHandler
../Project_Settings/Startup_Code/startup_MKL16Z4.S:183    .text:00000040 ADC0_IRQHandler
../Project_Settings/Startup_Code/startup_MKL16Z4.S:183    .text:00000040 CMP0_IRQHandler
../Project_Settings/Startup_Code/startup_MKL16Z4.S:183    .text:00000040 TPM0_IRQHandler
../Project_Settings/Startup_Code/startup_MKL16Z4.S:183    .text:00000040 TPM1_IRQHandler
../Project_Settings/Startup_Code/startup_MKL16Z4.S:183    .text:00000040 TPM2_IRQHandler
../Project_Settings/Startup_Code/startup_MKL16Z4.S:183    .text:00000040 RTC_IRQHandler
../Project_Settings/Startup_Code/startup_MKL16Z4.S:183    .text:00000040 RTC_Seconds_IRQHandler
../Project_Settings/Startup_Code/startup_MKL16Z4.S:183    .text:00000040 PIT_IRQHandler
../Project_Settings/Startup_Code/startup_MKL16Z4.S:183    .text:00000040 I2S0_IRQHandler
../Project_Settings/Startup_Code/startup_MKL16Z4.S:183    .text:00000040 Reserved40_IRQHandler
../Project_Settings/Startup_Code/startup_MKL16Z4.S:183    .text:00000040 DAC0_IRQHandler
../Project_Settings/Startup_Code/startup_MKL16Z4.S:183    .text:00000040 TSI0_IRQHandler
../Project_Settings/Startup_Code/startup_MKL16Z4.S:183    .text:00000040 MCG_IRQHandler
../Project_Settings/Startup_Code/startup_MKL16Z4.S:183    .text:00000040 LPTimer_IRQHandler
../Project_Settings/Startup_Code/startup_MKL16Z4.S:183    .text:00000040 Reserved45_IRQHandler
../Project_Settings/Startup_Code/startup_MKL16Z4.S:183    .text:00000040 PORTA_IRQHandler
../Project_Settings/Startup_Code/startup_MKL16Z4.S:183    .text:00000040 PORTC_PORTD_IRQHandler
../Project_Settings/Startup_Code/startup_MKL16Z4.S:107    *ABS*:e000e180 _NVIC_ICER
../Project_Settings/Startup_Code/startup_MKL16Z4.S:108    *ABS*:e000e280 _NVIC_ICPR
../Project_Settings/Startup_Code/startup_MKL16Z4.S:115    .text:00000000 $t
../Project_Settings/Startup_Code/startup_MKL16Z4.S:176    .text:00000028 $d
../Project_Settings/Startup_Code/startup_MKL16Z4.S:179    .text:00000040 $t
../Project_Settings/Startup_Code/startup_MKL16Z4.S:183    .text:00000040 Default_Handler
../Project_Settings/Startup_Code/startup_MKL16Z4.S:183    .text:00000040 DefaultISR
                   .debug_aranges:0000000c $d

UNDEFINED SYMBOLS
__StackTop
SystemInit
__etext
__data_start__
__data_end__
_start
