SRD Standelone programmation box: DSP_mkl16z256vlh4.h File Reference

| SRD Standelone programmation box 2.0 (16/11/15 10:00:00) Documentation of the SRD standelone programmation box

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DSP_mkl16z256vlh4.h File Reference

Device Support Package for tDSP_mkl16z256vlh4 device (support for Kinetis Design Studio). More...

`#include "MKL16Z4.h"`
Include dependency graph for DSP_mkl16z256vlh4.h:
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Go to the source code of this file.

## Data Structures

struct | tDeviceClock
| Define clock source. More...

## Macros

#define | WakeFromInterrupt() (__WFI())
| Function used to enable the processor wakeUp from interrupt controller. More...
#define | WakeFromEvent() (__WFE())
| Function used to enable the processor wakeUp from event controller. More...
#define | NVIC_PIT_REG (0UL)
| Define NVIC register used by specific peripherals. More...
#define | NVIC_UART0_REG (0UL)
| Define NVIC register used by specific peripherals. More...
#define | NVIC_UART1_REG (0UL)
| Define NVIC register used by specific peripherals. More...
#define | NVIC_UART2_REG (0UL)
| Define NVIC register used by specific peripherals. More...
#define | NVIC_PORTA_REG (0UL)
| Define NVIC register used by specific peripherals. More...
#define | NVIC_PORTC_REG (0UL)
| Define NVIC register used by specific peripherals. More...
#define | NVIC_PORTD_REG (0UL)
| Define NVIC register used by specific peripherals. More...
#define | NVIC_PIT_SHIFT (22UL)
| Define NVIC mask and shift values used by specific peripherals. More...
#define | NVIC_PIT_MASK (1UL << NVIC_PIT_SHIFT)
| Define NVIC mask and shift values used by specific peripherals. More...
#define | NVIC_UART0_SHIFT (12UL)
| Define NVIC mask and shift values used by specific peripherals. More...
#define | NVIC_UART0_MASK (1UL << NVIC_UART0_SHIFT)
| Define NVIC mask and shift values used by specific peripherals. More...
#define | NVIC_UART1_SHIFT (13UL)
| Define NVIC mask and shift values used by specific peripherals. More...
#define | NVIC_UART1_MASK (1UL << NVIC_UART1_SHIFT)
| Define NVIC mask and shift values used by specific peripherals. More...
#define | NVIC_UART2_SHIFT (14UL)
| Define NVIC mask and shift values used by specific peripherals. More...
#define | NVIC_UART2_MASK (1UL << NVIC_UART2_SHIFT)
| Define NVIC mask and shift values used by specific peripherals. More...
#define | NVIC_PORTA_SHIFT (30UL)
| Define NVIC mask and shift values used by specific peripherals. More...
#define | NVIC_PORTA_MASK (1UL << NVIC_PORTA_SHIFT)
| Define NVIC mask and shift values used by specific peripherals. More...
#define | NVIC_PORTC_SHIFT (31UL)
| Define NVIC mask and shift values used by specific peripherals. More...
#define | NVIC_PORTC_MASK (1UL << NVIC_PORTC_SHIFT)
| Define NVIC mask and shift values used by specific peripherals. More...
#define | NVIC_PORTD_SHIFT (31UL)
| Define NVIC mask and shift values used by specific peripherals. More...
#define | NVIC_PORTD_MASK (1UL << NVIC_PORTD_SHIFT)
| Define NVIC mask and shift values used by specific peripherals. More...
#define | IPR_NVIC_PIT_REG (5UL)
| Define NVIC PIT register used by specific peripherals. More...
#define | IPR_NVIC_UART0_REG (3UL)
| Define NVIC PIT register used by specific peripherals. More...
#define | IPR_NVIC_UART1_REG (3UL)
| Define NVIC PIT register used by specific peripherals. More...
#define | IPR_NVIC_UART2_REG (3UL)
| Define NVIC PIT register used by specific peripherals. More...
#define | IPR_NVIC_PORTA_REG (7UL)
| Define NVIC PIT register used by specific peripherals. More...
#define | IPR_NVIC_PORTC_REG (7UL)
| Define NVIC PIT register used by specific peripherals. More...
#define | IPR_NVIC_PORTD_REG (7UL)
| Define NVIC PIT register used by specific peripherals. More...
#define | IPR_NVIC_PIT_SHIFT (22UL)
| Define NVIC PIT register used by specific peripherals. More...
#define | IPR_NVIC_PIT_MASK (0x3UL << NVIC_PIT_SHIFT)
| Define NVIC PIT register used by specific peripherals. More...
#define | IPR_NVIC_UART0_SHIFT (6UL)
| Define NVIC PIT register used by specific peripherals. More...
#define | IPR_NVIC_UART0_MASK (0x3UL << NVIC_UART0_SHIFT)
| Define NVIC PIT register used by specific peripherals. More...
#define | IPR_NVIC_UART1_SHIFT (14UL)
| Define NVIC PIT register used by specific peripherals. More...
#define | IPR_NVIC_UART1_MASK (0x3UL << NVIC_UART1_SHIFT)
| Define NVIC PIT register used by specific peripherals. More...
#define | IPR_NVIC_UART2_SHIFT (22UL)
| Define NVIC PIT register used by specific peripherals. More...
#define | IPR_NVIC_UART2_MASK (0x3UL << NVIC_UART2_SHIFT)
| Define NVIC PIT register used by specific peripherals. More...
#define | IPR_NVIC_PORTA_SHIFT (22UL)
| Define NVIC PIT register used by specific peripherals. More...
#define | IPR_NVIC_PORTA_MASK (0x3UL << NVIC_PORTA_SHIFT)
| Define NVIC PIT register used by specific peripherals. More...
#define | IPR_NVIC_PORTC_SHIFT (30UL)
| Define NVIC PIT register used by specific peripherals. More...
#define | IPR_NVIC_PORTC_MASK (0x3UL << NVIC_PORTC_SHIFT)
| Define NVIC PIT register used by specific peripherals. More...
#define | IPR_NVIC_PORTD_SHIFT (30UL)
| Define NVIC PIT register used by specific peripherals. More...
#define | IPR_NVIC_PORTD_MASK (0x3UL << NVIC_PORTD_SHIFT)
| Define NVIC PIT register used by specific peripherals. More...
#define | UART0_MAPPING_RX 4
| MAP the pin for the UART0. More...
#define | UART0_MAPPING_TX 4
| Define NVIC PIT register used by specific peripherals. More...
#define | UART0_MAPPING_CTS 0
| Define NVIC PIT register used by specific peripherals. More...
#define | UART0_MAPPING_RTS 0
| Define NVIC PIT register used by specific peripherals. More...
#define | UART1_MAPPING_RX 1
| MAP the pin for the UART1. More...
#define | UART1_MAPPING_TX 1
| MAP the pin for the UART1. More...
#define | UART1_MAPPING_CTS 0
| MAP the pin for the UART1. More...
#define | UART1_MAPPING_RTS 0
| MAP the pin for the UART1. More...
#define | UART2_MAPPING_RX 3
| MAP the pin for the UART2. More...
#define | UART2_MAPPING_TX 3
| MAP the pin for the UART2. More...
#define | UART2_MAPPING_CTS 0
| MAP the pin for the UART2. More...
#define | UART2_MAPPING_RTS 0
| MAP the pin for the UART2. More...
#define | SPI0_MAPPING_SCLK 1
| MAP the pin for the SPI0. More...
#define | SPI0_MAPPING_MISO 0
| MAP the pin for the SPI0. More...
#define | SPI0_MAPPING_MOSI 1
| MAP the pin for the SPI0. More...
#define | SPI0_MAPPING_PCS0 0
| MAP the pin for the SPI0. More...
#define | SPI1_MAPPING_SCLK 1
| MAP the pin for the SPI1. More...
#define | SPI1_MAPPING_MISO 4
| MAP the pin for the SPI1. More...
#define | SPI1_MAPPING_MOSI 2
| MAP the pin for the SPI1. More...
#define | SPI1_MAPPING_PCS0 0
| MAP the pin for the SPI1. More...
#define | I2C0_MAPPING_SCL 2
| MAP the pin for the I2C0. More...
#define | I2C0_MAPPING_SDA 2
| MAP the pin for the I2C0. More...
#define | I2C1_MAPPING_SCL 0
| MAP the pin for the I2C1. More...
#define | I2C1_MAPPING_SDA 0
| MAP the pin for the I2C1. More...
#define | PIT_CLOCK_SOURCE (DeviceClock.busClockFreq)
| Define clock source for peripehrals. More...
#define | UART0_CLOCK_IS_MASTER_PERIPHERAL_CLOCK
| Define clock source for peripehrals. More...
#define | UART0_CLOCK_SOURCE (DeviceClock.masterPeripheralClockFreq)
| Define clock source for peripehrals. More...
#define | UART1_CLOCK_SOURCE (DeviceClock.busClockFreq)
| Define clock source for peripehrals. More...
#define | UART2_CLOCK_SOURCE (DeviceClock.busClockFreq)
| Define clock source for peripehrals. More...
#define | SPI0_CLOCK_SOURCE (DeviceClock.busClockFreq)
| Define clock source for peripehrals. More...
#define | SPI1_CLOCK_SOURCE (DeviceClock.busClockFreq)
| Define clock source for peripehrals. More...
#define | I2C0_CLOCK_SOURCE (DeviceClock.busClockFreq)
| Define clock source for peripehrals. More...
#define | I2C1_CLOCK_SOURCE (DeviceClock.SystemClockFreq)
| Define clock source for peripehrals. More...

## Functions

void | UART0ClockGate (unsigned char bool)
| Functions to enable/disable the main clock of the specified uart. More...
void | UART1ClockGate (unsigned char bool)
| Functions to enable/disable the main clock of the specified uart. More...
void | UART2ClockGate (unsigned char bool)
| Functions to enable/disable the main clock of the specified uart. More...
void | UART0PinMappingPeripheral (void)
| Functions to MAP the defined IO of the uart module x in the rigth pin. More...
void | UART1PinMappingPeripheral (void)
| Functions to MAP the defined IO of the uart module x in the rigth pin. More...
void | UART2PinMappingPeripheral (void)
| Functions to MAP the defined IO of the uart module x in the rigth pin. More...
void | SPI0ClockGate (unsigned char bool)
| Functions to enable/disable the main clock of the specified SPI. More...
void | SPI1ClockGate (unsigned char bool)
| Functions to enable/disable the main clock of the specified SPI. More...
void | SPI0PinMappingPeripheral (void)
| Functions to MAP the defined IO of the SPI module x in the rigth pin. More...
void | SPI1PinMappingPeripheral (void)
| Functions to MAP the defined IO of the SPI module x in the rigth pin. More...
void | I2C0ClockGate (unsigned char bool)
| Functions to enable/disable the main clock of the specified I2C. More...
void | I2C1ClockGate (unsigned char bool)
| Functions to enable/disable the main clock of the specified I2C. More...
void | I2C0PinMappingPeripheral (void)
| Functions to MAP the defined IO of the I2C module x in the rigth pin. More...
void | I2C1PinmappingPeripheral (void)
| Functions to MAP the defined IO of the I2C module x in the rigth pin. More...

## Variables

tDeviceClock | DeviceClock

## Detailed Description

Device Support Package for tDSP_mkl16z256vlh4 device (support for Kinetis Design Studio).

Author
  Thibaut LALUQUE 3D-Ouest

Date
  26/09/2014

Version
  1.0

Contains all device specific attributes for global lib.

Supported devices : MKL16Z256VLH4 \ details All Right Reserved.

Definition in file DSP_mkl16z256vlh4.h.

## Macro Definition Documentation

#define I2C0_CLOCK_SOURCE (DeviceClock.busClockFreq)

Define clock source for peripehrals.

Definition at line 328 of file DSP_mkl16z256vlh4.h.

Referenced by I2C0Init().

#define I2C0_MAPPING_SCL 2

MAP the pin for the I2C0.

MAP the pin for this SPI. The name pin is asserted as follow :

- SCL : 0=Not used, 1=Pin8(D2), 2=Pin20(H4), 3=Pin35(F7), 4=Pin37(E7), 5=Pin53(A6)
- SDA : 0=Not used, 1=Pin7(E2), 2=Pin21(H5), 3=Pin36(F6), 4=Pin38(E8), 5=Pin54(B5)

Definition at line 270 of file DSP_mkl16z256vlh4.h.

#define I2C0_MAPPING_SDA 2

MAP the pin for the I2C0.

MAP the pin for this SPI. The name pin is asserted as follow :

- SCL : 0=Not used, 1=Pin8(D2), 2=Pin20(H4), 3=Pin35(F7), 4=Pin37(E7), 5=Pin53(A6)
- SDA : 0=Not used, 1=Pin7(E2), 2=Pin21(H5), 3=Pin36(F6), 4=Pin38(E8), 5=Pin54(B5)

Definition at line 273 of file DSP_mkl16z256vlh4.h.

#define I2C1_CLOCK_SOURCE (DeviceClock.SystemClockFreq)

Define clock source for peripehrals.

Definition at line 329 of file DSP_mkl16z256vlh4.h.

#define I2C1_MAPPING_SCL 0

MAP the pin for the I2C1.

MAP the pin for this SPI. The name pin is asserted as follow :

- SCL : 0=Not used, 1=Pin2(B1), 2=Pin25(D5), 3=Pin44(C6), 4=Pin55(B4)
- SDA : 0=Not used, 1=Pin1(A1), 2=Pin26(G5), 3=Pin45(B7), 4=Pin56(E8)

Definition at line 285 of file DSP_mkl16z256vlh4.h.

#define I2C1_MAPPING_SDA 0

MAP the pin for the I2C1.

MAP the pin for this SPI. The name pin is asserted as follow :

- SCL : 0=Not used, 1=Pin2(B1), 2=Pin25(D5), 3=Pin44(C6), 4=Pin55(B4)
- SDA : 0=Not used, 1=Pin1(A1), 2=Pin26(G5), 3=Pin45(B7), 4=Pin56(E8)

Definition at line 288 of file DSP_mkl16z256vlh4.h.

#define IPR_NVIC_PIT_MASK (0x3UL << NVIC_PIT_SHIFT)

Define NVIC PIT register used by specific peripherals.

Definition at line 118 of file DSP_mkl16z256vlh4.h.

Referenced by PitInit().

#define IPR_NVIC_PIT_REG (5UL)

Define NVIC PIT register used by specific peripherals.

Definition at line 94 of file DSP_mkl16z256vlh4.h.

Referenced by PitInit().

#define IPR_NVIC_PIT_SHIFT (22UL)

Define NVIC PIT register used by specific peripherals.

Definition at line 117 of file DSP_mkl16z256vlh4.h.

Referenced by PitInit().

#define IPR_NVIC_PORTA_MASK (0x3UL << NVIC_PORTA_SHIFT)

Define NVIC PIT register used by specific peripherals.

Definition at line 130 of file DSP_mkl16z256vlh4.h.

Referenced by PowerManagerInit().

#define IPR_NVIC_PORTA_REG (7UL)

Define NVIC PIT register used by specific peripherals.

Definition at line 102 of file DSP_mkl16z256vlh4.h.

Referenced by PowerManagerInit().

#define IPR_NVIC_PORTA_SHIFT (22UL)

Define NVIC PIT register used by specific peripherals.

Definition at line 129 of file DSP_mkl16z256vlh4.h.

Referenced by PowerManagerInit().

#define IPR_NVIC_PORTC_MASK (0x3UL << NVIC_PORTC_SHIFT)

Define NVIC PIT register used by specific peripherals.

Definition at line 132 of file DSP_mkl16z256vlh4.h.

#define IPR_NVIC_PORTC_REG (7UL)

Define NVIC PIT register used by specific peripherals.

Definition at line 103 of file DSP_mkl16z256vlh4.h.

#define IPR_NVIC_PORTC_SHIFT (30UL)

Define NVIC PIT register used by specific peripherals.

Definition at line 131 of file DSP_mkl16z256vlh4.h.

#define IPR_NVIC_PORTD_MASK (0x3UL << NVIC_PORTD_SHIFT)

Define NVIC PIT register used by specific peripherals.

Definition at line 134 of file DSP_mkl16z256vlh4.h.

#define IPR_NVIC_PORTD_REG (7UL)

Define NVIC PIT register used by specific peripherals.

Definition at line 104 of file DSP_mkl16z256vlh4.h.

#define IPR_NVIC_PORTD_SHIFT (30UL)

Define NVIC PIT register used by specific peripherals.

Definition at line 133 of file DSP_mkl16z256vlh4.h.

#define IPR_NVIC_UART0_MASK (0x3UL << NVIC_UART0_SHIFT)

Define NVIC PIT register used by specific peripherals.

Definition at line 122 of file DSP_mkl16z256vlh4.h.

Referenced by Uart0Init().

#define IPR_NVIC_UART0_REG (3UL)

Define NVIC PIT register used by specific peripherals.

Definition at line 97 of file DSP_mkl16z256vlh4.h.

Referenced by Uart0Init().

#define IPR_NVIC_UART0_SHIFT (6UL)

Define NVIC PIT register used by specific peripherals.

Definition at line 121 of file DSP_mkl16z256vlh4.h.

Referenced by Uart0Init().

#define IPR_NVIC_UART1_MASK (0x3UL << NVIC_UART1_SHIFT)

Define NVIC PIT register used by specific peripherals.

Definition at line 124 of file DSP_mkl16z256vlh4.h.

Referenced by Uart1Init().

#define IPR_NVIC_UART1_REG (3UL)

Define NVIC PIT register used by specific peripherals.

Definition at line 98 of file DSP_mkl16z256vlh4.h.

Referenced by Uart1Init().

#define IPR_NVIC_UART1_SHIFT (14UL)

Define NVIC PIT register used by specific peripherals.

Definition at line 123 of file DSP_mkl16z256vlh4.h.

Referenced by Uart1Init().

#define IPR_NVIC_UART2_MASK (0x3UL << NVIC_UART2_SHIFT)

Define NVIC PIT register used by specific peripherals.

Definition at line 126 of file DSP_mkl16z256vlh4.h.

Referenced by Uart2Init().

#define IPR_NVIC_UART2_REG (3UL)

Define NVIC PIT register used by specific peripherals.

Definition at line 99 of file DSP_mkl16z256vlh4.h.

Referenced by Uart2Init().

#define IPR_NVIC_UART2_SHIFT (22UL)

Define NVIC PIT register used by specific peripherals.

Definition at line 125 of file DSP_mkl16z256vlh4.h.

Referenced by Uart2Init().

#define NVIC_PIT_MASK (1UL << NVIC_PIT_SHIFT)

Define NVIC mask and shift values used by specific peripherals.

Definition at line 65 of file DSP_mkl16z256vlh4.h.

Referenced by PitInit().

#define NVIC_PIT_REG (0UL)

Define NVIC register used by specific peripherals.

Definition at line 41 of file DSP_mkl16z256vlh4.h.

Referenced by PitInit().

#define NVIC_PIT_SHIFT (22UL)

Define NVIC mask and shift values used by specific peripherals.

Definition at line 64 of file DSP_mkl16z256vlh4.h.

#define NVIC_PORTA_MASK (1UL << NVIC_PORTA_SHIFT)

Define NVIC mask and shift values used by specific peripherals.

Definition at line 77 of file DSP_mkl16z256vlh4.h.

Referenced by PowerManagerInit().

#define NVIC_PORTA_REG (0UL)

Define NVIC register used by specific peripherals.

Definition at line 49 of file DSP_mkl16z256vlh4.h.

Referenced by PowerManagerInit().

#define NVIC_PORTA_SHIFT (30UL)

Define NVIC mask and shift values used by specific peripherals.

Definition at line 76 of file DSP_mkl16z256vlh4.h.

#define NVIC_PORTC_MASK (1UL << NVIC_PORTC_SHIFT)

Define NVIC mask and shift values used by specific peripherals.

Definition at line 79 of file DSP_mkl16z256vlh4.h.

#define NVIC_PORTC_REG (0UL)

Define NVIC register used by specific peripherals.

Definition at line 50 of file DSP_mkl16z256vlh4.h.

#define NVIC_PORTC_SHIFT (31UL)

Define NVIC mask and shift values used by specific peripherals.

Definition at line 78 of file DSP_mkl16z256vlh4.h.

#define NVIC_PORTD_MASK (1UL << NVIC_PORTD_SHIFT)

Define NVIC mask and shift values used by specific peripherals.

Definition at line 81 of file DSP_mkl16z256vlh4.h.

#define NVIC_PORTD_REG (0UL)

Define NVIC register used by specific peripherals.

Definition at line 51 of file DSP_mkl16z256vlh4.h.

#define NVIC_PORTD_SHIFT (31UL)

Define NVIC mask and shift values used by specific peripherals.

Definition at line 80 of file DSP_mkl16z256vlh4.h.

#define NVIC_UART0_MASK (1UL << NVIC_UART0_SHIFT)

Define NVIC mask and shift values used by specific peripherals.

Definition at line 69 of file DSP_mkl16z256vlh4.h.

Referenced by Uart0Init().

#define NVIC_UART0_REG (0UL)

Define NVIC register used by specific peripherals.

Definition at line 44 of file DSP_mkl16z256vlh4.h.

Referenced by Uart0Init().

#define NVIC_UART0_SHIFT (12UL)

Define NVIC mask and shift values used by specific peripherals.

Definition at line 68 of file DSP_mkl16z256vlh4.h.

#define NVIC_UART1_MASK (1UL << NVIC_UART1_SHIFT)

Define NVIC mask and shift values used by specific peripherals.

Definition at line 71 of file DSP_mkl16z256vlh4.h.

Referenced by Uart1Init().

#define NVIC_UART1_REG (0UL)

Define NVIC register used by specific peripherals.

Definition at line 45 of file DSP_mkl16z256vlh4.h.

Referenced by Uart1Init().

#define NVIC_UART1_SHIFT (13UL)

Define NVIC mask and shift values used by specific peripherals.

Definition at line 70 of file DSP_mkl16z256vlh4.h.

#define NVIC_UART2_MASK (1UL << NVIC_UART2_SHIFT)

Define NVIC mask and shift values used by specific peripherals.

Definition at line 73 of file DSP_mkl16z256vlh4.h.

Referenced by Uart2Init().

#define NVIC_UART2_REG (0UL)

Define NVIC register used by specific peripherals.

Definition at line 46 of file DSP_mkl16z256vlh4.h.

Referenced by Uart2Init().

#define NVIC_UART2_SHIFT (14UL)

Define NVIC mask and shift values used by specific peripherals.

Definition at line 72 of file DSP_mkl16z256vlh4.h.

#define PIT_CLOCK_SOURCE (DeviceClock.busClockFreq)

Define clock source for peripehrals.

Definition at line 301 of file DSP_mkl16z256vlh4.h.

Referenced by PitInit().

#define SPI0_CLOCK_SOURCE (DeviceClock.busClockFreq)

Define clock source for peripehrals.

Definition at line 324 of file DSP_mkl16z256vlh4.h.

Referenced by Spi0Init().

#define SPI0_MAPPING_MISO 0

MAP the pin for the SPI0.

MAP the pin for this SPI. The name pin is asserted as follow :

- SCLK : 0=Not used, 1=Pin6(D1), 2=Pin50(A8), 3=Pin58(A4)
- MISO : 0=Not used, 1=Pin7(E2), 2=Pin8(D2), 3=Pin51(A7), 4=Pin52(B6), 5=Pin59(C2), 6=Pin60(B3)
- MOSI : 0=Not used, 1=Pin7(E2), 2=Pin8(D2), 3=Pin51(17), 4=Pin52(B6), 5=Pin59(C2), 6=Pin60(B3)
- PCS0 : 0=Not used, 1=Pin5(E1), 2=Pin49(B8), 3=Pin57(C3)

Definition at line 226 of file DSP_mkl16z256vlh4.h.

#define SPI0_MAPPING_MOSI 1

MAP the pin for the SPI0.

MAP the pin for this SPI. The name pin is asserted as follow :

- SCLK : 0=Not used, 1=Pin6(D1), 2=Pin50(A8), 3=Pin58(A4)
- MISO : 0=Not used, 1=Pin7(E2), 2=Pin8(D2), 3=Pin51(A7), 4=Pin52(B6), 5=Pin59(C2), 6=Pin60(B3)
- MOSI : 0=Not used, 1=Pin7(E2), 2=Pin8(D2), 3=Pin51(17), 4=Pin52(B6), 5=Pin59(C2), 6=Pin60(B3)
- PCS0 : 0=Not used, 1=Pin5(E1), 2=Pin49(B8), 3=Pin57(C3)

Definition at line 229 of file DSP_mkl16z256vlh4.h.

#define SPI0_MAPPING_PCS0 0

MAP the pin for the SPI0.

MAP the pin for this SPI. The name pin is asserted as follow :

- SCLK : 0=Not used, 1=Pin6(D1), 2=Pin50(A8), 3=Pin58(A4)
- MISO : 0=Not used, 1=Pin7(E2), 2=Pin8(D2), 3=Pin51(A7), 4=Pin52(B6), 5=Pin59(C2), 6=Pin60(B3)
- MOSI : 0=Not used, 1=Pin7(E2), 2=Pin8(D2), 3=Pin51(17), 4=Pin52(B6), 5=Pin59(C2), 6=Pin60(B3)
- PCS0 : 0=Not used, 1=Pin5(E1), 2=Pin49(B8), 3=Pin57(C3)

Definition at line 232 of file DSP_mkl16z256vlh4.h.

#define SPI0_MAPPING_SCLK 1

MAP the pin for the SPI0.

MAP the pin for this SPI. The name pin is asserted as follow :

- SCLK : 0=Not used, 1=Pin6(D1), 2=Pin50(A8), 3=Pin58(A4)
- MISO : 0=Not used, 1=Pin7(E2), 2=Pin8(D2), 3=Pin51(A7), 4=Pin52(B6), 5=Pin59(C2), 6=Pin60(B3)
- MOSI : 0=Not used, 1=Pin7(E2), 2=Pin8(D2), 3=Pin51(17), 4=Pin52(B6), 5=Pin59(C2), 6=Pin60(B3)
- PCS0 : 0=Not used, 1=Pin5(E1), 2=Pin49(B8), 3=Pin57(C3)

Definition at line 223 of file DSP_mkl16z256vlh4.h.

#define SPI1_CLOCK_SOURCE (DeviceClock.busClockFreq)

Define clock source for peripehrals.

Definition at line 325 of file DSP_mkl16z256vlh4.h.

Referenced by Spi1Init().

#define SPI1_MAPPING_MISO 4

MAP the pin for the SPI1.

MAP the pin for this SPI. The name pin is asserted as follow :

- SCLK : 0=Not used, 1=Pin6(D1), 2=Pin50(A8), 3=Pin58(A4)
- MISO : 0=Not used, 1=Pin7(E2), 2=Pin8(D2), 3=Pin51(A7), 4=Pin52(B6), 5=Pin59(C2), 6=Pin60(B3)
- MOSI : 0=Not used, 1=Pin7(E2), 2=Pin8(D2), 3=Pin51(17), 4=Pin52(B6), 5=Pin59(C2), 6=Pin60(B3)
- PCS0 : 0=Not used, 1=Pin5(E1), 2=Pin49(B8), 3=Pin57(C3)

Definition at line 249 of file DSP_mkl16z256vlh4.h.

#define SPI1_MAPPING_MOSI 2

MAP the pin for the SPI1.

MAP the pin for this SPI. The name pin is asserted as follow :

- SCLK : 0=Not used, 1=Pin6(D1), 2=Pin50(A8), 3=Pin58(A4)
- MISO : 0=Not used, 1=Pin7(E2), 2=Pin8(D2), 3=Pin51(A7), 4=Pin52(B6), 5=Pin59(C2), 6=Pin60(B3)
- MOSI : 0=Not used, 1=Pin7(E2), 2=Pin8(D2), 3=Pin51(17), 4=Pin52(B6), 5=Pin59(C2), 6=Pin60(B3)
- PCS0 : 0=Not used, 1=Pin5(E1), 2=Pin49(B8), 3=Pin57(C3)

Definition at line 252 of file DSP_mkl16z256vlh4.h.

#define SPI1_MAPPING_PCS0 0

MAP the pin for the SPI1.

MAP the pin for this SPI. The name pin is asserted as follow :

- SCLK : 0=Not used, 1=Pin6(D1), 2=Pin50(A8), 3=Pin58(A4)
- MISO : 0=Not used, 1=Pin7(E2), 2=Pin8(D2), 3=Pin51(A7), 4=Pin52(B6), 5=Pin59(C2), 6=Pin60(B3)
- MOSI : 0=Not used, 1=Pin7(E2), 2=Pin8(D2), 3=Pin51(17), 4=Pin52(B6), 5=Pin59(C2), 6=Pin60(B3)
- PCS0 : 0=Not used, 1=Pin5(E1), 2=Pin49(B8), 3=Pin57(C3)

Definition at line 255 of file DSP_mkl16z256vlh4.h.

#define SPI1_MAPPING_SCLK 1

MAP the pin for the SPI1.

MAP the pin for this SPI. The name pin is asserted as follow :

- SCLK : 0=Not used, 1=Pin6(D1), 2=Pin50(A8), 3=Pin58(A4)
- MISO : 0=Not used, 1=Pin7(E2), 2=Pin8(D2), 3=Pin51(A7), 4=Pin52(B6), 5=Pin59(C2), 6=Pin60(B3)
- MOSI : 0=Not used, 1=Pin7(E2), 2=Pin8(D2), 3=Pin51(17), 4=Pin52(B6), 5=Pin59(C2), 6=Pin60(B3)
- PCS0 : 0=Not used, 1=Pin5(E1), 2=Pin49(B8), 3=Pin57(C3)

Definition at line 246 of file DSP_mkl16z256vlh4.h.

#define UART0_CLOCK_IS_MASTER_PERIPHERAL_CLOCK

Define clock source for peripehrals.

Definition at line 306 of file DSP_mkl16z256vlh4.h.

#define UART0_CLOCK_SOURCE (DeviceClock.masterPeripheralClockFreq)

Define clock source for peripehrals.

Definition at line 311 of file DSP_mkl16z256vlh4.h.

Referenced by Uart0Init().

#define UART0_MAPPING_CTS 0

Define NVIC PIT register used by specific peripherals.

Definition at line 157 of file DSP_mkl16z256vlh4.h.

#define UART0_MAPPING_RTS 0

Define NVIC PIT register used by specific peripherals.

Definition at line 160 of file DSP_mkl16z256vlh4.h.

#define UART0_MAPPING_RX 4

MAP the pin for the UART0.

MAP the pin for this UART. The name pin is asserted as follow :

- RX : 0=Not used, 1=Pin9(G1), 2=Pin23(D4), 3=Pin39(E6), 4=Pin63(B2)
- TX : 0=Not used, 1=Pin10(F1), 2=Pin24(E5), 3=Pin40(D7), 4=Pin64(A2)
- CTS : 0=Not used
- RTS : 0=Not used

Definition at line 151 of file DSP_mkl16z256vlh4.h.

#define UART0_MAPPING_TX 4

Define NVIC PIT register used by specific peripherals.

Definition at line 154 of file DSP_mkl16z256vlh4.h.

#define UART1_CLOCK_SOURCE (DeviceClock.busClockFreq)

Define clock source for peripehrals.

Definition at line 320 of file DSP_mkl16z256vlh4.h.

Referenced by Uart1Init().

#define UART1_MAPPING_CTS 0

MAP the pin for the UART1.

MAP the pin for this UART. The name pin is asserted as follow :

- RX : 0=Not used, 1=Pin2(B1), 2=Pin32(H8), 3=Pin46(C8)
- TX : 0=Not used, 1=Pin1(A1), 2=Pin33(G8), 3=Pin49(B8)
- CTS : 0=Not used
- RTS : 0=Not used

Definition at line 180 of file DSP_mkl16z256vlh4.h.

#define UART1_MAPPING_RTS 0

MAP the pin for the UART1.

MAP the pin for this UART. The name pin is asserted as follow :

- RX : 0=Not used, 1=Pin2(B1), 2=Pin32(H8), 3=Pin46(C8)
- TX : 0=Not used, 1=Pin1(A1), 2=Pin33(G8), 3=Pin49(B8)
- CTS : 0=Not used
- RTS : 0=Not used

Definition at line 183 of file DSP_mkl16z256vlh4.h.

#define UART1_MAPPING_RX 1

MAP the pin for the UART1.

MAP the pin for this UART. The name pin is asserted as follow :

- RX : 0=Not used, 1=Pin2(B1), 2=Pin32(H8), 3=Pin46(C8)
- TX : 0=Not used, 1=Pin1(A1), 2=Pin33(G8), 3=Pin49(B8)
- CTS : 0=Not used
- RTS : 0=Not used

Definition at line 174 of file DSP_mkl16z256vlh4.h.

#define UART1_MAPPING_TX 1

MAP the pin for the UART1.

MAP the pin for this UART. The name pin is asserted as follow :

- RX : 0=Not used, 1=Pin2(B1), 2=Pin32(H8), 3=Pin46(C8)
- TX : 0=Not used, 1=Pin1(A1), 2=Pin33(G8), 3=Pin49(B8)
- CTS : 0=Not used
- RTS : 0=Not used

Definition at line 177 of file DSP_mkl16z256vlh4.h.

#define UART2_CLOCK_SOURCE (DeviceClock.busClockFreq)

Define clock source for peripehrals.

Definition at line 321 of file DSP_mkl16z256vlh4.h.

Referenced by Uart2Init().

#define UART2_MAPPING_CTS 0

MAP the pin for the UART2.

MAP the pin for this UART. The name pin is asserted as follow :

- RX : 0=Not used, 1=Pin2(B1), 2=Pin32(H8), 3=Pin46(C8)
- TX : 0=Not used, 1=Pin1(A1), 2=Pin33(G8), 3=Pin49(B8)
- CTS : 0=Not used
- RTS : 0=Not used

Definition at line 203 of file DSP_mkl16z256vlh4.h.

#define UART2_MAPPING_RTS 0

MAP the pin for the UART2.

MAP the pin for this UART. The name pin is asserted as follow :

- RX : 0=Not used, 1=Pin2(B1), 2=Pin32(H8), 3=Pin46(C8)
- TX : 0=Not used, 1=Pin1(A1), 2=Pin33(G8), 3=Pin49(B8)
- CTS : 0=Not used
- RTS : 0=Not used

Definition at line 206 of file DSP_mkl16z256vlh4.h.

#define UART2_MAPPING_RX 3

MAP the pin for the UART2.

MAP the pin for this UART. The name pin is asserted as follow :

- RX : 0=Not used, 1=Pin2(B1), 2=Pin32(H8), 3=Pin46(C8)
- TX : 0=Not used, 1=Pin1(A1), 2=Pin33(G8), 3=Pin49(B8)
- CTS : 0=Not used
- RTS : 0=Not used

Definition at line 197 of file DSP_mkl16z256vlh4.h.

#define UART2_MAPPING_TX 3

MAP the pin for the UART2.

MAP the pin for this UART. The name pin is asserted as follow :

- RX : 0=Not used, 1=Pin2(B1), 2=Pin32(H8), 3=Pin46(C8)
- TX : 0=Not used, 1=Pin1(A1), 2=Pin33(G8), 3=Pin49(B8)
- CTS : 0=Not used
- RTS : 0=Not used

Definition at line 200 of file DSP_mkl16z256vlh4.h.

#define WakeFromEvent | ( |  | ) | (__WFE())

Function used to enable the processor wakeUp from event controller.

Definition at line 449 of file DSP_mkl16z256vlh4.h.

#define WakeFromInterrupt | ( |  | ) | (__WFI())

Function used to enable the processor wakeUp from interrupt controller.

Definition at line 441 of file DSP_mkl16z256vlh4.h.

Referenced by LPM_DeepSleep(), and LPM_Sleep().

## Function Documentation

void I2C0ClockGate | ( | unsigned char | bool | ) |

Functions to enable/disable the main clock of the specified I2C.

Definition at line 137 of file DSP_mkl16z256vlh4.c.

Referenced by I2C0Init().

137 {
138 if(bool) {
139 SIM->SCGC4 |= SIM_SCGC4_I2C0_MASK;
140 } else {
141 SIM->SCGC4 &= ~SIM_SCGC4_I2C0_MASK;
142 }
143 }

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void I2C0PinMappingPeripheral | ( | void |  | ) |

Functions to MAP the defined IO of the I2C module x in the rigth pin.

Definition at line 435 of file DSP_mkl16z256vlh4.c.

Referenced by I2C0Init().

435 {
436
437 /*=== SCL mapping ===*/
438 #if I2C0_MAPPING_SCL == 1
439 SIM->SCGC5 |=SIM_SCGC5_PORTE_MASK;
440 PORTE->PCR[19] &= ~PORT_PCR_MUX_MASK;
441 PORTE->PCR[19] |= PORT_PCR_MUX(4);
442 #elif I2C0_MAPPING_SCL == 2
443 SIM->SCGC5 |=SIM_SCGC5_PORTE_MASK;
444 PORTE->PCR[24] &= ~PORT_PCR_MUX_MASK;
445 PORTE->PCR[24] |= PORT_PCR_MUX(5);
446 #elif I2C0_MAPPING_SCL == 3
447 SIM->SCGC5 |=SIM_SCGC5_PORTB_MASK;
448 PORTB->PCR[0] &= ~PORT_PCR_MUX_MASK;
449 PORTB->PCR[0] |= PORT_PCR_MUX(2);
450 #elif I2C0_MAPPING_SCL == 4
451 SIM->SCGC5 |=SIM_SCGC5_PORTB_MASK;
452 PORTB->PCR[2] &= ~PORT_PCR_MUX_MASK;
453 PORTB->PCR[2] |= PORT_PCR_MUX(2);
454 #elif I2C0_MAPPING_SCL == 4
455 SIM->SCGC5 |=SIM_SCGC5_PORTC_MASK;
456 PORTC->PCR[8] &= ~PORT_PCR_MUX_MASK;
457 PORTC->PCR[8] |= PORT_PCR_MUX(2);
458 #endif
459
460 /*=== SCLK mapping ===*/
461 #if I2C0_MAPPING_SDA == 1
462 SIM->SCGC5 |=SIM_SCGC5_PORTE_MASK;
463 PORTE->PCR[18] &= ~PORT_PCR_MUX_MASK;
464 PORTE->PCR[18] |= PORT_PCR_MUX(4);
465 #elif I2C0_MAPPING_SDA == 2
466 SIM->SCGC5 |=SIM_SCGC5_PORTE_MASK;
467 PORTE->PCR[25] &= ~PORT_PCR_MUX_MASK;
468 PORTE->PCR[25] |= PORT_PCR_MUX(5);
469 #elif I2C0_MAPPING_SDA == 3
470 SIM->SCGC5 |=SIM_SCGC5_PORTB_MASK;
471 PORTB->PCR[1] &= ~PORT_PCR_MUX_MASK;
472 PORTB->PCR[1] |= PORT_PCR_MUX(2);
473 #elif I2C0_MAPPING_SDA == 4
474 SIM->SCGC5 |=SIM_SCGC5_PORTB_MASK;
475 PORTB->PCR[3] &= ~PORT_PCR_MUX_MASK;
476 PORTB->PCR[3] |= PORT_PCR_MUX(2);
477 #elif I2C0_MAPPING_SDA == 4
478 SIM->SCGC5 |=SIM_SCGC5_PORTC_MASK;
479 PORTC->PCR[9] &= ~PORT_PCR_MUX_MASK;
480 PORTC->PCR[9] |= PORT_PCR_MUX(2);
481 #endif
482 }

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void I2C1ClockGate | ( | unsigned char | bool | ) |

Functions to enable/disable the main clock of the specified I2C.

Definition at line 145 of file DSP_mkl16z256vlh4.c.

145 {
146 if(bool) {
147 SIM->SCGC4 |= SIM_SCGC4_I2C1_MASK;
148 } else {
149 SIM->SCGC4 &= ~SIM_SCGC4_I2C1_MASK;
150 }
151 }

void I2C1PinmappingPeripheral | ( | void |  | ) |

Functions to MAP the defined IO of the I2C module x in the rigth pin.

void SPI0ClockGate | ( | unsigned char | bool | ) |

Functions to enable/disable the main clock of the specified SPI.

Definition at line 117 of file DSP_mkl16z256vlh4.c.

Referenced by Spi0Init().

117 {
118 if(bool) {
119 SIM->SCGC4 |= SIM_SCGC4_SPI0_MASK;
120 } else {
121 SIM->SCGC4 &= ~SIM_SCGC4_SPI0_MASK;
122 }
123 }

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void SPI0PinMappingPeripheral | ( | void |  | ) |

Functions to MAP the defined IO of the SPI module x in the rigth pin.

Definition at line 278 of file DSP_mkl16z256vlh4.c.

Referenced by DisplaySetPower(), PowerManagerExitLPM(), and Spi0Init().

278 {
279
280 /*=== SCLK mapping ===*/
281 #if SPI0_MAPPING_SCLK == 1
282 SIM->SCGC5 |=SIM_SCGC5_PORTE_MASK;
283 PORTE->PCR[17] &= ~PORT_PCR_MUX_MASK;
284 PORTE->PCR[17] |= PORT_PCR_MUX(2);
285 #elif SPI0_MAPPING_SCLK == 2
286 SIM->SCGC5 |=SIM_SCGC5_PORTC_MASK;
287 PORTC->PCR[5] &= ~PORT_PCR_MUX_MASK;
288 PORTC->PCR[5] |= PORT_PCR_MUX(2);
289 #elif SPI0_MAPPING_SCLK == 3
290 SIM->SCGC5 |=SIM_SCGC5_PORTD_MASK;
291 PORTD->PCR[1] &= ~PORT_PCR_MUX_MASK;
292 PORTD->PCR[1] |= PORT_PCR_MUX(2);
293 #endif
294
295 /*=== MISO mapping ===*/
296 #if SPI0_MAPPING_MISO == 1
297 SIM->SCGC5 |=SIM_SCGC5_PORTE_MASK;
298 PORTE->PCR[18] &= ~PORT_PCR_MUX_MASK;
299 PORTE->PCR[18] |= PORT_PCR_MUX(5);
300 #elif SPI0_MAPPING_MISO == 2
301 SIM->SCGC5 |=SIM_SCGC5_PORTE_MASK;
302 PORTE->PCR[19] &= ~PORT_PCR_MUX_MASK;
303 PORTE->PCR[19] |= PORT_PCR_MUX(2);
304 #elif SPI0_MAPPING_MISO == 3
305 SIM->SCGC5 |=SIM_SCGC5_PORTC_MASK;
306 PORTC->PCR[6] &= ~PORT_PCR_MUX_MASK;
307 PORTC->PCR[6] |= PORT_PCR_MUX(5);
308 #elif SPI0_MAPPING_MISO == 4
309 SIM->SCGC5 |=SIM_SCGC5_PORTC_MASK;
310 PORTC->PCR[7] &= ~PORT_PCR_MUX_MASK;
311 PORTC->PCR[7] |= PORT_PCR_MUX(2);
312 #elif SPI0_MAPPING_MISO == 5
313 SIM->SCGC5 |=SIM_SCGC5_PORTD_MASK;
314 PORTD->PCR[2] &= ~PORT_PCR_MUX_MASK;
315 PORTD->PCR[2] |= PORT_PCR_MUX(5);
316 #elif SPI0_MAPPING_MISO == 6
317 SIM->SCGC5 |=SIM_SCGC5_PORTD_MASK;
318 PORTD->PCR[3] &= ~PORT_PCR_MUX_MASK;
319 PORTD->PCR[3] |= PORT_PCR_MUX(2);
320 #endif
321
322 /*=== MOSI mapping ===*/
323 #if SPI0_MAPPING_MOSI == 1
324 SIM->SCGC5 |=SIM_SCGC5_PORTE_MASK;
325 PORTE->PCR[18] &= ~PORT_PCR_MUX_MASK;
326 PORTE->PCR[18] |= PORT_PCR_MUX(2);
327 #elif SPI0_MAPPING_MOSI == 2
328 SIM->SCGC5 |=SIM_SCGC5_PORTE_MASK;
329 PORTE->PCR[19] &= ~PORT_PCR_MUX_MASK;
330 PORTE->PCR[19] |= PORT_PCR_MUX(5);
331 #elif SPI0_MAPPING_MOSI == 3
332 SIM->SCGC5 |=SIM_SCGC5_PORTC_MASK;
333 PORTC->PCR[6] &= ~PORT_PCR_MUX_MASK;
334 PORTC->PCR[6] |= PORT_PCR_MUX(2);
335 #elif SPI0_MAPPING_MOSI == 4
336 SIM->SCGC5 |=SIM_SCGC5_PORTC_MASK;
337 PORTC->PCR[7] &= ~PORT_PCR_MUX_MASK;
338 PORTC->PCR[7] |= PORT_PCR_MUX(5);
339 #elif SPI0_MAPPING_MOSI == 5
340 SIM->SCGC5 |=SIM_SCGC5_PORTD_MASK;
341 PORTD->PCR[2] &= ~PORT_PCR_MUX_MASK;
342 PORTD->PCR[2] |= PORT_PCR_MUX(2);
343 #elif SPI0_MAPPING_MOSI == 6
344 SIM->SCGC5 |=SIM_SCGC5_PORTD_MASK;
345 PORTD->PCR[3] &= ~PORT_PCR_MUX_MASK;
346 PORTD->PCR[3] |= PORT_PCR_MUX(5);
347 #endif
348
349 /*=== PCS0 mapping ===*/
350 #if SPI0_MAPPING_PCS0 == 1
351 SIM->SCGC5 |=SIM_SCGC5_PORTE_MASK;
352 PORTE->PCR[16] &= ~PORT_PCR_MUX_MASK;
353 PORTE->PCR[16] |= PORT_PCR_MUX(2);
354 #elif SPI0_MAPPING_PCS0 == 2
355 SIM->SCGC5 |=SIM_SCGC5_PORTC_MASK;
356 PORTC->PCR[4] &= ~PORT_PCR_MUX_MASK;
357 PORTC->PCR[4] |= PORT_PCR_MUX(2);
358 #elif SPI0_MAPPING_PCS0 == 3
359 SIM->SCGC5 |=SIM_SCGC5_PORTD_MASK;
360 PORTD->PCR[0] &= ~PORT_PCR_MUX_MASK;
361 PORTD->PCR[0] |= PORT_PCR_MUX(2);
362 #endif
363 }

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void SPI1ClockGate | ( | unsigned char | bool | ) |

Functions to enable/disable the main clock of the specified SPI.

Definition at line 125 of file DSP_mkl16z256vlh4.c.

Referenced by Spi1Init().

125 {
126 if(bool) {
127 SIM->SCGC4 |= SIM_SCGC4_SPI1_MASK;
128 } else {
129 SIM->SCGC4 &= ~SIM_SCGC4_SPI1_MASK;
130 }
131 }

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void SPI1PinMappingPeripheral | ( | void |  | ) |

Functions to MAP the defined IO of the SPI module x in the rigth pin.

Definition at line 365 of file DSP_mkl16z256vlh4.c.

Referenced by Spi1Init().

365 {
366
367 /*=== SCLK mapping ===*/
368 #if SPI1_MAPPING_SCLK == 1
369 SIM->SCGC5 |=SIM_SCGC5_PORTD_MASK;
370 PORTD->PCR[5] &= ~PORT_PCR_MUX_MASK;
371 PORTD->PCR[5] |= PORT_PCR_MUX(2);
372 #endif
373
374 /*=== MISO mapping ===*/
375 #if SPI1_MAPPING_MISO == 1
376 SIM->SCGC5 |=SIM_SCGC5_PORTE_MASK;
377 PORTE->PCR[0] &= ~PORT_PCR_MUX_MASK;
378 PORTE->PCR[0] |= PORT_PCR_MUX(2);
379 #elif SPI1_MAPPING_MISO == 2
380 SIM->SCGC5 |=SIM_SCGC5_PORTE_MASK;
381 PORTE->PCR[1] &= ~PORT_PCR_MUX_MASK;
382 PORTE->PCR[1] |= PORT_PCR_MUX(5);
383 #elif SPI1_MAPPING_MISO == 3
384 SIM->SCGC5 |=SIM_SCGC5_PORTB_MASK;
385 PORTB->PCR[16] &= ~PORT_PCR_MUX_MASK;
386 PORTB->PCR[16] |= PORT_PCR_MUX(5);
387 #elif SPI1_MAPPING_MISO == 4
388 SIM->SCGC5 |=SIM_SCGC5_PORTB_MASK;
389 PORTB->PCR[17] &= ~PORT_PCR_MUX_MASK;
390 PORTB->PCR[17] |= PORT_PCR_MUX(2);
391 #elif SPI1_MAPPING_MISO == 5
392 SIM->SCGC5 |=SIM_SCGC5_PORTD_MASK;
393 PORTD->PCR[6] &= ~PORT_PCR_MUX_MASK;
394 PORTD->PCR[6] |= PORT_PCR_MUX(5);
395 #elif SPI1_MAPPING_MISO == 6
396 SIM->SCGC5 |=SIM_SCGC5_PORTD_MASK;
397 PORTD->PCR[7] &= ~PORT_PCR_MUX_MASK;
398 PORTD->PCR[7] |= PORT_PCR_MUX(2);
399 #endif
400
401 /*=== MOSI mapping ===*/
402 #if SPI1_MAPPING_MOSI == 1
403 SIM->SCGC5 |=SIM_SCGC5_PORTE_MASK;
404 PORTE->PCR[1] &= ~PORT_PCR_MUX_MASK;
405 PORTE->PCR[1] |= PORT_PCR_MUX(2);
406 #elif SPI1_MAPPING_MOSI == 2
407 SIM->SCGC5 |=SIM_SCGC5_PORTB_MASK;
408 PORTB->PCR[16] &= ~PORT_PCR_MUX_MASK;
409 PORTB->PCR[16] |= PORT_PCR_MUX(2);
410 #elif SPI1_MAPPING_MOSI == 3
411 SIM->SCGC5 |=SIM_SCGC5_PORTB_MASK;
412 PORTB->PCR[17] &= ~PORT_PCR_MUX_MASK;
413 PORTB->PCR[17] |= PORT_PCR_MUX(5);
414 #elif SPI1_MAPPING_MOSI == 4
415 SIM->SCGC5 |=SIM_SCGC5_PORTD_MASK;
416 PORTD->PCR[6] &= ~PORT_PCR_MUX_MASK;
417 PORTD->PCR[6] |= PORT_PCR_MUX(2);
418 #elif SPI1_MAPPING_MOSI == 5
419 SIM->SCGC5 |=SIM_SCGC5_PORTD_MASK;
420 PORTD->PCR[7] &= ~PORT_PCR_MUX_MASK;
421 PORTD->PCR[7] |= PORT_PCR_MUX(5);
422 #endif
423
424 #if SPI1_MAPPING_PCS0 == 1
425 SIM->SCGC5 |= SIM_SCGC5_PORTD_MASK;
426 PORTD->PCR[4] &= ~PORT_PCR_MUX_MASK;
427 PORTD->PCR[4] |= PORT_PCR_MUX(2);
428 #endif
429 }

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void UART0ClockGate | ( | unsigned char | bool | ) |

Functions to enable/disable the main clock of the specified uart.

Definition at line 73 of file DSP_mkl16z256vlh4.c.

Referenced by PowerManagerEnterLPM(), PowerManagerExitLPM(), and Uart0Init().

73 {
74
75 /*-- Disable clock gate --*/
76 SIM->SCGC4 &= ~SIM_SCGC4_UART0_MASK;
77
78 /*--Update SIM to select UART0 clock source --*/
79 #if defined(UART0_CLOCK_IS_MASTER_PERIPHERAL_CLOCK)
80 SIM->SOPT2 = (SIM->SOPT2 & 0xF3FFFFFF) | 0x04000000;
81 #elif defined(UART0_CLOCK_IS_OSCERCLK)
82 SIM->SOPT2 = (SIM->SOPT2 & 0xF3FFFFFF) | 0x08000000;
83 #elif defined(UART0_CLOCK_IS_MCGIRCLK)
84 SIM->SOPT2 = (SIM->SOPT2 & 0xF3FFFFFF) | 0x0C000000;
85 #else
86 SIM->SOPT2 = (SIM->SOPT2 & 0xF3FFFFFF);
87 #warning "No clock source defined in the dsp file for this module"
88 #endif
89
90 /*-- Enable / Disable clock source --*/
91 if(bool) {
92 SIM->SCGC4 |= SIM_SCGC4_UART0_MASK;
93 } else {
94 SIM->SCGC4 &= ~SIM_SCGC4_UART0_MASK;
95 }
96 }

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void UART0PinMappingPeripheral | ( | void |  | ) |

Functions to MAP the defined IO of the uart module x in the rigth pin.

Definition at line 157 of file DSP_mkl16z256vlh4.c.

Referenced by Uart0Init().

157 {
158
159 /*=== RX mapping ===*/
160 #if UART0_MAPPING_RX == 1
161 SIM->SCGC5 |=SIM_SCGC5_PORTE_MASK;
162 PORTE->PCR[21] &= ~PORT_PCR_MUX_MASK;
163 PORTE->PCR[21] |= PORT_PCR_MUX(4);
164 #elif UART0_MAPPING_RX == 2
165 SIM->SCGC5 |=SIM_SCGC5_PORTA_MASK;
166 PORTA->PCR[1] &= ~PORT_PCR_MUX_MASK;
167 PORTA->PCR[1] |= PORT_PCR_MUX(2);
168 #elif UART0_MAPPING_RX == 3
169 SIM->SCGC5 |=SIM_SCGC5_PORTB_MASK;
170 PORTB->PCR[16] &= ~PORT_PCR_MUX_MASK;
171 PORTB->PCR[16] |= PORT_PCR_MUX(3);
172 #elif UART0_MAPPING_RX == 4
173 SIM->SCGC5 |=SIM_SCGC5_PORTD_MASK;
174 PORTD->PCR[6] &= ~PORT_PCR_MUX_MASK;
175 PORTD->PCR[6] |= PORT_PCR_MUX(3);
176 #endif
177
178 /*=== TX mapping ===*/
179 #if UART0_MAPPING_TX == 1
180 SIM->SCGC5 |=SIM_SCGC5_PORTE_MASK;
181 PORTE->PCR[20] &= ~PORT_PCR_MUX_MASK;
182 PORTE->PCR[20] |= PORT_PCR_MUX(4);
183 #elif UART0_MAPPING_TX == 2
184 SIM->SCGC5 |=SIM_SCGC5_PORTA_MASK;
185 PORTA->PCR[2] &= ~PORT_PCR_MUX_MASK;
186 PORTA->PCR[2] |= PORT_PCR_MUX(2);
187 #elif UART0_MAPPING_TX == 3
188 SIM->SCGC5 |=SIM_SCGC5_PORTB_MASK;
189 PORTB->PCR[17] &= ~PORT_PCR_MUX_MASK;
190 PORTB->PCR[17] |= PORT_PCR_MUX(3);
191 #elif UART0_MAPPING_TX == 4
192 SIM->SCGC5 |=SIM_SCGC5_PORTD_MASK;
193 PORTD->PCR[7] &= ~PORT_PCR_MUX_MASK;
194 PORTD->PCR[7] |= PORT_PCR_MUX(3);
195 #endif
196
197 }

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void UART1ClockGate | ( | unsigned char | bool | ) |

Functions to enable/disable the main clock of the specified uart.

Definition at line 98 of file DSP_mkl16z256vlh4.c.

Referenced by PowerManagerEnterLPM(), PowerManagerExitLPM(), and Uart1Init().

98 {
99 if(bool) {
100 SIM->SCGC4 |= SIM_SCGC4_UART1_MASK;
101 } else {
102 SIM->SCGC4 &= ~SIM_SCGC4_UART1_MASK;
103 }
104 }

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void UART1PinMappingPeripheral | ( | void |  | ) |

Functions to MAP the defined IO of the uart module x in the rigth pin.

Definition at line 199 of file DSP_mkl16z256vlh4.c.

Referenced by Uart1Init().

199 {
200
201 /*=== RX mapping ===*/
202 #if UART1_MAPPING_RX == 1
203 SIM->SCGC5 |=SIM_SCGC5_PORTE_MASK;
204 PORTE->PCR[1] &= ~PORT_PCR_MUX_MASK;
205 PORTE->PCR[1] |= PORT_PCR_MUX(3);
206 #elif UART1_MAPPING_RX == 2
207 SIM->SCGC5 |=SIM_SCGC5_PORTA_MASK;
208 PORTA->PCR[18] &= ~PORT_PCR_MUX_MASK;
209 PORTA->PCR[18] |= PORT_PCR_MUX(3);
210 #elif UART1_MAPPING_RX == 3
211 SIM->SCGC5 |=SIM_SCGC5_PORTC_MASK;
212 PORTC->PCR[3] &= ~PORT_PCR_MUX_MASK;
213 PORTC->PCR[3] |= PORT_PCR_MUX(3);
214 #endif
215
216 /*=== TX mapping ===*/
217 #if UART1_MAPPING_TX == 1
218 SIM->SCGC5 |=SIM_SCGC5_PORTE_MASK;
219 PORTE->PCR[0] &= ~PORT_PCR_MUX_MASK;
220 PORTE->PCR[0] |= PORT_PCR_MUX(3);
221 #elif UART1_MAPPING_TX == 2
222 SIM->SCGC5 |=SIM_SCGC5_PORTA_MASK;
223 PORTA->PCR[19] &= ~PORT_PCR_MUX_MASK;
224 PORTA->PCR[19] |= PORT_PCR_MUX(3);
225 #elif UART1_MAPPING_TX == 3
226 SIM->SCGC5 |=SIM_SCGC5_PORTC_MASK;
227 PORTC->PCR[4] &= ~PORT_PCR_MUX_MASK;
228 PORTC->PCR[4] |= PORT_PCR_MUX(3);
229 #endif
230
231 }

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void UART2ClockGate | ( | unsigned char | bool | ) |

Functions to enable/disable the main clock of the specified uart.

Definition at line 106 of file DSP_mkl16z256vlh4.c.

Referenced by PowerManagerEnterLPM(), PowerManagerExitLPM(), and Uart2Init().

106 {
107 if(bool) {
108 SIM->SCGC4 |= SIM_SCGC4_UART2_MASK;
109 } else {
110 SIM->SCGC4 &= ~SIM_SCGC4_UART2_MASK;
111 }
112 }

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void UART2PinMappingPeripheral | ( | void |  | ) |

Functions to MAP the defined IO of the uart module x in the rigth pin.

Definition at line 233 of file DSP_mkl16z256vlh4.c.

Referenced by Uart2Init().

233 {
234
235 /*=== RX mapping ===*/
236 #if UART2_MAPPING_RX == 1
237 SIM->SCGC5 |=SIM_SCGC5_PORTE_MASK;
238 PORTE->PCR[17] &= ~PORT_PCR_MUX_MASK;
239 PORTE->PCR[17] |= PORT_PCR_MUX(3);
240 #elif UART2_MAPPING_RX == 2
241 SIM->SCGC5 |=SIM_SCGC5_PORTE_MASK;
242 PORTE->PCR[23] &= ~PORT_PCR_MUX_MASK;
243 PORTE->PCR[23] |= PORT_PCR_MUX(4);
244 #elif UART2_MAPPING_RX == 3
245 SIM->SCGC5 |=SIM_SCGC5_PORTD_MASK;
246 PORTD->PCR[2] &= ~PORT_PCR_MUX_MASK;
247 PORTD->PCR[2] |= PORT_PCR_MUX(3);
248 #elif UART2_MAPPING_RX == 4
249 SIM->SCGC5 |=SIM_SCGC5_PORTD_MASK;
250 PORTD->PCR[4] &= ~PORT_PCR_MUX_MASK;
251 PORTD->PCR[4] |= PORT_PCR_MUX(3);
252 #endif
253
254 /*=== TX mapping ===*/
255 #if UART2_MAPPING_TX == 1
256 SIM->SCGC5 |=SIM_SCGC5_PORTE_MASK;
257 PORTE->PCR[16] &= ~PORT_PCR_MUX_MASK;
258 PORTE->PCR[16] |= PORT_PCR_MUX(3);
259 #elif UART2_MAPPING_TX == 2
260 SIM->SCGC5 |=SIM_SCGC5_PORTE_MASK;
261 PORTE->PCR[22] &= ~PORT_PCR_MUX_MASK;
262 PORTE->PCR[22] |= PORT_PCR_MUX(4);
263 #elif UART2_MAPPING_TX == 3
264 SIM->SCGC5 |=SIM_SCGC5_PORTD_MASK;
265 PORTD->PCR[3] &= ~PORT_PCR_MUX_MASK;
266 PORTD->PCR[3] |= PORT_PCR_MUX(3);
267 #elif UART2_MAPPING_TX == 4
268 SIM->SCGC5 |=SIM_SCGC5_PORTD_MASK;
269 PORTD->PCR[5] &= ~PORT_PCR_MUX_MASK;
270 PORTD->PCR[5] |= PORT_PCR_MUX(3);
271 #endif
272
273 }

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## Variable Documentation

tDeviceClock DeviceClock

Definition at line 53 of file DSP_mkl16z256vlh4.c.

Referenced by DeviceClockSwitchDefaultFEI(), and DeviceClockSwitchHighPower().