/*!
\page SM1 SM1 (SPIMaster_LDD)
**         This component "SPIMaster_LDD" implements MASTER part of synchronous
**         serial master-slave communication.

- \subpage SM1_settings
- \subpage SM1_regs_overview  
- \subpage SM1_regs_details
- \ref SM1_module "Component documentation" 

\page SM1_regs_overview Registers Initialization Overview
This page initialization values for the registers of the peripheral(s) configured
by the component. 
<table>
<tr><td colspan="4" class="ttitle1">SM1 Initialization</td></tr>
<tr><td class="ttitle2">Address</td><td class="ttitle2">Register</td><td class="ttitle2">Register Value</td><td class="ttitle2">Register Description</td></tr>
<tr><td>0x40048034</td><td>SIM_SCGC4</td><td>
    0x00800400
 </td><td>SIM_SCGC4 register, peripheral SM1.</td></tr>
<tr><td>0x4004C01C</td><td>PORTD_PCR7</td><td>
    0x00000200
 </td><td>PORTD_PCR7 register, peripheral SM1.</td></tr>
<tr><td>0x4004D004</td><td>PORTE_PCR1</td><td>
    0x00000200
 </td><td>PORTE_PCR1 register, peripheral SM1.</td></tr>
<tr><td>0x4004C014</td><td>PORTD_PCR5</td><td>
    0x00000200
 </td><td>PORTD_PCR5 register, peripheral SM1.</td></tr>
<tr><td>0x40077003</td><td>SPI1_C1</td><td>
    0x00000056
 </td><td>SPI1_C1 register, peripheral SM1.</td></tr>
<tr><td>0x40077002</td><td>SPI1_C2</td><td>
    0x00000010
 </td><td>SPI1_C2 register, peripheral SM1.</td></tr>
<tr><td>0x4007700B</td><td>SPI1_C3</td><td>
    0x00000000
 </td><td>SPI1_C3 register, peripheral SM1.</td></tr>
<tr><td>0x40077001</td><td>SPI1_BR</td><td>
    0x00000024
 </td><td>SPI1_BR register, peripheral SM1.</td></tr>
<tr><td>0x4007700A</td><td>SPI1_CI</td><td>
    0x0000000F
 </td><td>SPI1_CI register, peripheral SM1.</td></tr>
</table>
<br/>
\page SM1_regs_details Register Initialization Details
This page contains detailed description of initialization values for the 
registers of the peripheral(s) configured by the component. 

<div class="reghdr1">SIM_SCGC4</div>
<div class="regdiag">
<table class="regtbl">
<tr class="trd1r">
<td class="trd1c">Bit</td><td>31</td><td>30</td><td>29</td><td>28</td><td>27</td><td>26</td><td>25</td><td>24</td><td>23</td>
<td>22</td><td>21</td><td>20</td><td>19</td><td>18</td><td>17</td><td>16</td>
</tr>
<tr>
<td class="trd1c">R</td><td colspan="1" rowspan="2">-</td><td colspan="1" rowspan="2">-</td><td colspan="1" rowspan="2">-</td>
<td colspan="1" rowspan="2">-</td><td colspan="1" rowspan="2">-</td><td colspan="1" rowspan="2">-</td>
<td colspan="1" rowspan="2">-</td><td colspan="1" rowspan="2">-</td><td colspan="1" rowspan="2">SPI1</td>
<td colspan="1" rowspan="2">SPI0</td><td colspan="1" rowspan="2">-</td><td colspan="1" rowspan="2">-</td>
<td colspan="1" rowspan="2">CMP</td><td colspan="1" rowspan="2">USBOTG</td><td colspan="1" rowspan="2">-</td>
<td colspan="1" rowspan="2">-</td>
</tr>
<tr>
<td class="trd1c">W</td>
</tr>
<tr class="trd1r">
<td class="trd1c">Reset</td><td>0</td><td>0</td><td>0</td><td>0</td><td>0</td><td>0</td><td>0</td><td>0</td><td>0</td><td>0</td>
<td>0</td><td>0</td><td>0</td><td>0</td><td>0</td><td>0</td>
</tr>
</table>
<table class="regtbl">
<tr class="trd1r">
<td class="trd1c">Bit</td><td>15</td><td>14</td><td>13</td><td>12</td><td>11</td><td>10</td><td>9</td><td>8</td><td>7</td>
<td>6</td><td>5</td><td>4</td><td>3</td><td>2</td><td>1</td><td>0</td>
</tr>
<tr>
<td class="trd1c">R</td><td colspan="1" rowspan="2">-</td><td colspan="1" rowspan="2">-</td><td colspan="1" rowspan="2">-</td>
<td colspan="1" rowspan="2">UART2</td><td colspan="1" rowspan="2">UART1</td><td colspan="1" rowspan="2">UART0</td>
<td colspan="1" rowspan="2">-</td><td colspan="1" rowspan="2">-</td><td colspan="1" rowspan="2">I2C1</td>
<td colspan="1" rowspan="2">I2C0</td><td colspan="1" rowspan="2">-</td><td colspan="1" rowspan="2">-</td>
<td colspan="1" rowspan="2">-</td><td colspan="1" rowspan="2">-</td><td colspan="1" rowspan="2">-</td>
<td colspan="1" rowspan="2">-</td>
</tr>
<tr>
<td class="trd1c">W</td>
</tr>
<tr class="trd1r">
<td class="trd1c">Reset</td><td>0</td><td>0</td><td>0</td><td>0</td><td>0</td><td>0</td><td>0</td><td>0</td><td>0</td><td>0</td>
<td>0</td><td>0</td><td>0</td><td>0</td><td>0</td><td>0</td>
</tr>
</table>
        
</div>
<table class="regtbl2"><tr><td class="trowtit" colspan="2">Address</td><td colspan="2">0x40048034</td></tr>
<tr class="trowtit"><td  class="trowtit" colspan="2">Initial value</td><td colspan="2">0x00800400</td></tr>
<tr class="trowtit"><td  class="trowtit" colspan="2">After-reset value</td><td colspan="2">0xF0000030</td></tr>
<tr><td class="ttitle2">Bit</td><td class="ttitle2">Field</td><td class="ttitle2">Value</td><td class="ttitle2">Description</td></tr>
<tr><td>23</td><td>SPI1</td><td>0x01</td><td>SPI1 Clock Gate Control</td>
<tr><td>22</td><td>SPI0</td><td>0x00</td><td>SPI0 Clock Gate Control</td>
<tr><td>19</td><td>CMP</td><td>0x00</td><td>Comparator Clock Gate Control</td>
<tr><td>18</td><td>USBOTG</td><td>0x00</td><td>USB Clock Gate Control</td>
<tr><td>12</td><td>UART2</td><td>0x00</td><td>UART2 Clock Gate Control</td>
<tr><td>11</td><td>UART1</td><td>0x00</td><td>UART1 Clock Gate Control</td>
<tr><td>10</td><td>UART0</td><td>0x01</td><td>UART0 Clock Gate Control</td>
<tr><td>7</td><td>I2C1</td><td>0x00</td><td>I2C1 Clock Gate Control</td>
<tr><td>6</td><td>I2C0</td><td>0x00</td><td>I2C0 Clock Gate Control</td>
</tr></table>
<div class="reghdr1">PORTD_PCR7</div>
<div class="regdiag">
<table class="regtbl">
<tr class="trd1r">
<td class="trd1c">Bit</td><td>31</td><td>30</td><td>29</td><td>28</td><td>27</td><td>26</td><td>25</td><td>24</td><td>23</td>
<td>22</td><td>21</td><td>20</td><td>19</td><td>18</td><td>17</td><td>16</td>
</tr>
<tr>
<td class="trd1c">R</td><td colspan="1" rowspan="2">-</td><td colspan="1" rowspan="2">-</td><td colspan="1" rowspan="2">-</td>
<td colspan="1" rowspan="2">-</td><td colspan="1" rowspan="2">-</td><td colspan="1" rowspan="2">-</td>
<td colspan="1" rowspan="2">-</td><td colspan="1" rowspan="2">ISF</td><td colspan="1" rowspan="2">-</td>
<td colspan="1" rowspan="2">-</td><td colspan="1" rowspan="2">-</td><td colspan="1" rowspan="2">-</td>
<td colspan="4" rowspan="2">IRQC</td>
</tr>
<tr>
<td class="trd1c">W</td>
</tr>
<tr class="trd1r">
<td class="trd1c">Reset</td><td>0</td><td>0</td><td>0</td><td>0</td><td>0</td><td>0</td><td>0</td><td>0</td><td>0</td><td>0</td>
<td>0</td><td>0</td><td>0</td><td>0</td><td>0</td><td>0</td>
</tr>
</table>
<table class="regtbl">
<tr class="trd1r">
<td class="trd1c">Bit</td><td>15</td><td>14</td><td>13</td><td>12</td><td>11</td><td>10</td><td>9</td><td>8</td><td>7</td>
<td>6</td><td>5</td><td>4</td><td>3</td><td>2</td><td>1</td><td>0</td>
</tr>
<tr>
<td class="trd1c">R</td><td colspan="1" rowspan="2">-</td><td colspan="1" rowspan="2">-</td><td colspan="1" rowspan="2">-</td>
<td colspan="1" rowspan="2">-</td><td colspan="1" rowspan="2">-</td><td colspan="3" rowspan="2">MUX</td>
<td colspan="1" rowspan="2">-</td><td colspan="1" rowspan="2">DSE</td><td colspan="1" rowspan="2">-</td>
<td colspan="1" rowspan="2">PFE</td><td colspan="1" rowspan="2">-</td><td colspan="1" rowspan="2">SRE</td>
<td colspan="1" rowspan="2">PE</td><td colspan="1" rowspan="2">PS</td>
</tr>
<tr>
<td class="trd1c">W</td>
</tr>
<tr class="trd1r">
<td class="trd1c">Reset</td><td>0</td><td>0</td><td>0</td><td>0</td><td>0</td><td>0</td><td>0</td><td>0</td><td>0</td><td>0</td>
<td>0</td><td>0</td><td>0</td><td>0</td><td>0</td><td>0</td>
</tr>
</table>
        
</div>
<table class="regtbl2"><tr><td class="trowtit" colspan="2">Address</td><td colspan="2">0x4004C01C</td></tr>
<tr class="trowtit"><td  class="trowtit" colspan="2">Initial value</td><td colspan="2">0x00000200</td></tr>
<tr class="trowtit"><td  class="trowtit" colspan="2">After-reset value</td><td colspan="2">0x00000000</td></tr>
<tr><td class="ttitle2">Bit</td><td class="ttitle2">Field</td><td class="ttitle2">Value</td><td class="ttitle2">Description</td></tr>
<tr><td>24</td><td>ISF</td><td>0x00</td><td>Interrupt Status Flag</td>
<tr><td>16 - 19</td><td>IRQC</td><td>0x00</td><td>Interrupt Configuration</td>
<tr><td>8 - 10</td><td>MUX</td><td>0x00</td><td>Pin Mux Control</td>
<tr><td>6</td><td>DSE</td><td>0x00</td><td>Drive Strength Enable</td>
<tr><td>4</td><td>PFE</td><td>0x00</td><td>Passive Filter Enable</td>
<tr><td>2</td><td>SRE</td><td>0x00</td><td>Slew Rate Enable</td>
<tr><td>1</td><td>PE</td><td>0x00</td><td>Pull Enable</td>
<tr><td>0</td><td>PS</td><td>0x00</td><td>Pull Select</td>
</tr></table>
<div class="reghdr1">PORTE_PCR1</div>
<div class="regdiag">
<table class="regtbl">
<tr class="trd1r">
<td class="trd1c">Bit</td><td>31</td><td>30</td><td>29</td><td>28</td><td>27</td><td>26</td><td>25</td><td>24</td><td>23</td>
<td>22</td><td>21</td><td>20</td><td>19</td><td>18</td><td>17</td><td>16</td>
</tr>
<tr>
<td class="trd1c">R</td><td colspan="1" rowspan="2">-</td><td colspan="1" rowspan="2">-</td><td colspan="1" rowspan="2">-</td>
<td colspan="1" rowspan="2">-</td><td colspan="1" rowspan="2">-</td><td colspan="1" rowspan="2">-</td>
<td colspan="1" rowspan="2">-</td><td colspan="1" rowspan="2">ISF</td><td colspan="1" rowspan="2">-</td>
<td colspan="1" rowspan="2">-</td><td colspan="1" rowspan="2">-</td><td colspan="1" rowspan="2">-</td>
<td colspan="4" rowspan="2">IRQC</td>
</tr>
<tr>
<td class="trd1c">W</td>
</tr>
<tr class="trd1r">
<td class="trd1c">Reset</td><td>0</td><td>0</td><td>0</td><td>0</td><td>0</td><td>0</td><td>0</td><td>0</td><td>0</td><td>0</td>
<td>0</td><td>0</td><td>0</td><td>0</td><td>0</td><td>0</td>
</tr>
</table>
<table class="regtbl">
<tr class="trd1r">
<td class="trd1c">Bit</td><td>15</td><td>14</td><td>13</td><td>12</td><td>11</td><td>10</td><td>9</td><td>8</td><td>7</td>
<td>6</td><td>5</td><td>4</td><td>3</td><td>2</td><td>1</td><td>0</td>
</tr>
<tr>
<td class="trd1c">R</td><td colspan="1" rowspan="2">-</td><td colspan="1" rowspan="2">-</td><td colspan="1" rowspan="2">-</td>
<td colspan="1" rowspan="2">-</td><td colspan="1" rowspan="2">-</td><td colspan="3" rowspan="2">MUX</td>
<td colspan="1" rowspan="2">-</td><td colspan="1" rowspan="2">DSE</td><td colspan="1" rowspan="2">-</td>
<td colspan="1" rowspan="2">PFE</td><td colspan="1" rowspan="2">-</td><td colspan="1" rowspan="2">SRE</td>
<td colspan="1" rowspan="2">PE</td><td colspan="1" rowspan="2">PS</td>
</tr>
<tr>
<td class="trd1c">W</td>
</tr>
<tr class="trd1r">
<td class="trd1c">Reset</td><td>0</td><td>0</td><td>0</td><td>0</td><td>0</td><td>0</td><td>0</td><td>0</td><td>0</td><td>0</td>
<td>0</td><td>0</td><td>0</td><td>0</td><td>0</td><td>0</td>
</tr>
</table>
        
</div>
<table class="regtbl2"><tr><td class="trowtit" colspan="2">Address</td><td colspan="2">0x4004D004</td></tr>
<tr class="trowtit"><td  class="trowtit" colspan="2">Initial value</td><td colspan="2">0x00000200</td></tr>
<tr class="trowtit"><td  class="trowtit" colspan="2">After-reset value</td><td colspan="2">0x00000000</td></tr>
<tr><td class="ttitle2">Bit</td><td class="ttitle2">Field</td><td class="ttitle2">Value</td><td class="ttitle2">Description</td></tr>
<tr><td>24</td><td>ISF</td><td>0x00</td><td>Interrupt Status Flag</td>
<tr><td>16 - 19</td><td>IRQC</td><td>0x00</td><td>Interrupt Configuration</td>
<tr><td>8 - 10</td><td>MUX</td><td>0x00</td><td>Pin Mux Control</td>
<tr><td>6</td><td>DSE</td><td>0x00</td><td>Drive Strength Enable</td>
<tr><td>4</td><td>PFE</td><td>0x00</td><td>Passive Filter Enable</td>
<tr><td>2</td><td>SRE</td><td>0x00</td><td>Slew Rate Enable</td>
<tr><td>1</td><td>PE</td><td>0x00</td><td>Pull Enable</td>
<tr><td>0</td><td>PS</td><td>0x00</td><td>Pull Select</td>
</tr></table>
<div class="reghdr1">PORTD_PCR5</div>
<div class="regdiag">
<table class="regtbl">
<tr class="trd1r">
<td class="trd1c">Bit</td><td>31</td><td>30</td><td>29</td><td>28</td><td>27</td><td>26</td><td>25</td><td>24</td><td>23</td>
<td>22</td><td>21</td><td>20</td><td>19</td><td>18</td><td>17</td><td>16</td>
</tr>
<tr>
<td class="trd1c">R</td><td colspan="1" rowspan="2">-</td><td colspan="1" rowspan="2">-</td><td colspan="1" rowspan="2">-</td>
<td colspan="1" rowspan="2">-</td><td colspan="1" rowspan="2">-</td><td colspan="1" rowspan="2">-</td>
<td colspan="1" rowspan="2">-</td><td colspan="1" rowspan="2">ISF</td><td colspan="1" rowspan="2">-</td>
<td colspan="1" rowspan="2">-</td><td colspan="1" rowspan="2">-</td><td colspan="1" rowspan="2">-</td>
<td colspan="4" rowspan="2">IRQC</td>
</tr>
<tr>
<td class="trd1c">W</td>
</tr>
<tr class="trd1r">
<td class="trd1c">Reset</td><td>0</td><td>0</td><td>0</td><td>0</td><td>0</td><td>0</td><td>0</td><td>0</td><td>0</td><td>0</td>
<td>0</td><td>0</td><td>0</td><td>0</td><td>0</td><td>0</td>
</tr>
</table>
<table class="regtbl">
<tr class="trd1r">
<td class="trd1c">Bit</td><td>15</td><td>14</td><td>13</td><td>12</td><td>11</td><td>10</td><td>9</td><td>8</td><td>7</td>
<td>6</td><td>5</td><td>4</td><td>3</td><td>2</td><td>1</td><td>0</td>
</tr>
<tr>
<td class="trd1c">R</td><td colspan="1" rowspan="2">-</td><td colspan="1" rowspan="2">-</td><td colspan="1" rowspan="2">-</td>
<td colspan="1" rowspan="2">-</td><td colspan="1" rowspan="2">-</td><td colspan="3" rowspan="2">MUX</td>
<td colspan="1" rowspan="2">-</td><td colspan="1" rowspan="2">DSE</td><td colspan="1" rowspan="2">-</td>
<td colspan="1" rowspan="2">PFE</td><td colspan="1" rowspan="2">-</td><td colspan="1" rowspan="2">SRE</td>
<td colspan="1" rowspan="2">PE</td><td colspan="1" rowspan="2">PS</td>
</tr>
<tr>
<td class="trd1c">W</td>
</tr>
<tr class="trd1r">
<td class="trd1c">Reset</td><td>0</td><td>0</td><td>0</td><td>0</td><td>0</td><td>0</td><td>0</td><td>0</td><td>0</td><td>0</td>
<td>0</td><td>0</td><td>0</td><td>0</td><td>0</td><td>0</td>
</tr>
</table>
        
</div>
<table class="regtbl2"><tr><td class="trowtit" colspan="2">Address</td><td colspan="2">0x4004C014</td></tr>
<tr class="trowtit"><td  class="trowtit" colspan="2">Initial value</td><td colspan="2">0x00000200</td></tr>
<tr class="trowtit"><td  class="trowtit" colspan="2">After-reset value</td><td colspan="2">0x00000000</td></tr>
<tr><td class="ttitle2">Bit</td><td class="ttitle2">Field</td><td class="ttitle2">Value</td><td class="ttitle2">Description</td></tr>
<tr><td>24</td><td>ISF</td><td>0x00</td><td>Interrupt Status Flag</td>
<tr><td>16 - 19</td><td>IRQC</td><td>0x00</td><td>Interrupt Configuration</td>
<tr><td>8 - 10</td><td>MUX</td><td>0x00</td><td>Pin Mux Control</td>
<tr><td>6</td><td>DSE</td><td>0x00</td><td>Drive Strength Enable</td>
<tr><td>4</td><td>PFE</td><td>0x00</td><td>Passive Filter Enable</td>
<tr><td>2</td><td>SRE</td><td>0x00</td><td>Slew Rate Enable</td>
<tr><td>1</td><td>PE</td><td>0x00</td><td>Pull Enable</td>
<tr><td>0</td><td>PS</td><td>0x00</td><td>Pull Select</td>
</tr></table>
<div class="reghdr1">SPI1_C1</div>
<div class="regdiag">
<table class="regtbl">
<tr class="trd1r">
<td class="trd1c">Bit</td><td>7</td><td>6</td><td>5</td><td>4</td><td>3</td><td>2</td><td>1</td><td>0</td>
</tr>
<tr>
<td class="trd1c">R</td><td colspan="1" rowspan="2">SPIE</td><td colspan="1" rowspan="2">SPE</td>
<td colspan="1" rowspan="2">SPTIE</td><td colspan="1" rowspan="2">MSTR</td><td colspan="1" rowspan="2">CPOL</td>
<td colspan="1" rowspan="2">CPHA</td><td colspan="1" rowspan="2">SSOE</td><td colspan="1" rowspan="2">LSBFE</td>
</tr>
<tr>
<td class="trd1c">W</td>
</tr>
<tr class="trd1r">
<td class="trd1c">Reset</td><td>0</td><td>0</td><td>0</td><td>0</td><td>0</td><td>0</td><td>0</td><td>0</td>
</tr>
</table>
        
</div>
<table class="regtbl2"><tr><td class="trowtit" colspan="2">Address</td><td colspan="2">0x40077003</td></tr>
<tr class="trowtit"><td  class="trowtit" colspan="2">Initial value</td><td colspan="2">0x00000056</td></tr>
<tr class="trowtit"><td  class="trowtit" colspan="2">After-reset value</td><td colspan="2">0x00000004</td></tr>
<tr><td class="ttitle2">Bit</td><td class="ttitle2">Field</td><td class="ttitle2">Value</td><td class="ttitle2">Description</td></tr>
<tr><td>7</td><td>SPIE</td><td>0x00</td><td>SPI interrupt enable: for SPRF and MODF (when FIFO is not supported or not enabled) or for read FIFO (when FIFO is supported and enabled)</td>
<tr><td>6</td><td>SPE</td><td>0x01</td><td>SPI system enable</td>
<tr><td>5</td><td>SPTIE</td><td>0x00</td><td>SPI transmit interrupt enable</td>
<tr><td>4</td><td>MSTR</td><td>0x01</td><td>Master/slave mode select</td>
<tr><td>3</td><td>CPOL</td><td>0x00</td><td>Clock polarity</td>
<tr><td>2</td><td>CPHA</td><td>0x01</td><td>Clock phase</td>
<tr><td>1</td><td>SSOE</td><td>0x01</td><td>Slave select output enable</td>
<tr><td>0</td><td>LSBFE</td><td>0x00</td><td>LSB first (shifter direction)</td>
</tr></table>
<div class="reghdr1">SPI1_C2</div>
<div class="regdiag">
<table class="regtbl">
<tr class="trd1r">
<td class="trd1c">Bit</td><td>7</td><td>6</td><td>5</td><td>4</td><td>3</td><td>2</td><td>1</td><td>0</td>
</tr>
<tr>
<td class="trd1c">R</td><td colspan="1" rowspan="2">SPMIE</td><td colspan="1" rowspan="2">SPIMODE</td>
<td colspan="1" rowspan="2">TXDMAE</td><td colspan="1" rowspan="2">MODFEN</td><td colspan="1" rowspan="2">BIDIROE</td>
<td colspan="1" rowspan="2">RXDMAE</td><td colspan="1" rowspan="2">SPISWAI</td><td colspan="1" rowspan="2">SPC0</td>
</tr>
<tr>
<td class="trd1c">W</td>
</tr>
<tr class="trd1r">
<td class="trd1c">Reset</td><td>0</td><td>0</td><td>0</td><td>0</td><td>0</td><td>0</td><td>0</td><td>0</td>
</tr>
</table>
        
</div>
<table class="regtbl2"><tr><td class="trowtit" colspan="2">Address</td><td colspan="2">0x40077002</td></tr>
<tr class="trowtit"><td  class="trowtit" colspan="2">Initial value</td><td colspan="2">0x00000010</td></tr>
<tr class="trowtit"><td  class="trowtit" colspan="2">After-reset value</td><td colspan="2">0x00000000</td></tr>
<tr><td class="ttitle2">Bit</td><td class="ttitle2">Field</td><td class="ttitle2">Value</td><td class="ttitle2">Description</td></tr>
<tr><td>7</td><td>SPMIE</td><td>0x00</td><td>SPI match interrupt enable</td>
<tr><td>6</td><td>SPIMODE</td><td>0x00</td><td>SPI 8-bit or 16-bit mode</td>
<tr><td>5</td><td>TXDMAE</td><td>0x00</td><td>Transmit DMA enable</td>
<tr><td>4</td><td>MODFEN</td><td>0x01</td><td>Master mode-fault function enable</td>
<tr><td>3</td><td>BIDIROE</td><td>0x00</td><td>Bidirectional mode output enable</td>
<tr><td>2</td><td>RXDMAE</td><td>0x00</td><td>Receive DMA enable</td>
<tr><td>1</td><td>SPISWAI</td><td>0x00</td><td>SPI stop in wait mode</td>
<tr><td>0</td><td>SPC0</td><td>0x00</td><td>SPI pin control 0</td>
</tr></table>
<div class="reghdr1">SPI1_C3</div>
<div class="regdiag">
<table class="regtbl">
<tr class="trd1r">
<td class="trd1c">Bit</td><td>7</td><td>6</td><td>5</td><td>4</td><td>3</td><td>2</td><td>1</td><td>0</td>
</tr>
<tr>
<td class="trd1c">R</td><td colspan="1" rowspan="2">-</td><td colspan="1" rowspan="2">-</td>
<td colspan="1" rowspan="2">TNEAREF_MARK</td><td colspan="1" rowspan="2">RNFULLF_MARK</td>
<td colspan="1" rowspan="2">INTCLR</td><td colspan="1" rowspan="2">TNEARIEN</td><td colspan="1" rowspan="2">RNFULLIEN</td>
<td colspan="1" rowspan="2">FIFOMODE</td>
</tr>
<tr>
<td class="trd1c">W</td>
</tr>
<tr class="trd1r">
<td class="trd1c">Reset</td><td>0</td><td>0</td><td>0</td><td>0</td><td>0</td><td>0</td><td>0</td><td>0</td>
</tr>
</table>
        
</div>
<table class="regtbl2"><tr><td class="trowtit" colspan="2">Address</td><td colspan="2">0x4007700B</td></tr>
<tr class="trowtit"><td  class="trowtit" colspan="2">Initial value</td><td colspan="2">0x00000000</td></tr>
<tr class="trowtit"><td  class="trowtit" colspan="2">After-reset value</td><td colspan="2">0x00000000</td></tr>
<tr><td class="ttitle2">Bit</td><td class="ttitle2">Field</td><td class="ttitle2">Value</td><td class="ttitle2">Description</td></tr>
<tr><td>5</td><td>TNEAREF_MARK</td><td>0x00</td><td>Transmit FIFO nearly empty watermark</td>
<tr><td>4</td><td>RNFULLF_MARK</td><td>0x00</td><td>Receive FIFO nearly full watermark</td>
<tr><td>3</td><td>INTCLR</td><td>0x00</td><td>Interrupt clearing mechanism select</td>
<tr><td>2</td><td>TNEARIEN</td><td>0x00</td><td>Transmit FIFO nearly empty interrupt enable</td>
<tr><td>1</td><td>RNFULLIEN</td><td>0x00</td><td>Receive FIFO nearly full interrupt enable</td>
<tr><td>0</td><td>FIFOMODE</td><td>0x00</td><td>FIFO mode enable</td>
</tr></table>
<div class="reghdr1">SPI1_BR</div>
<div class="regdiag">
<table class="regtbl">
<tr class="trd1r">
<td class="trd1c">Bit</td><td>7</td><td>6</td><td>5</td><td>4</td><td>3</td><td>2</td><td>1</td><td>0</td>
</tr>
<tr>
<td class="trd1c">R</td><td colspan="1" rowspan="2">-</td><td colspan="3" rowspan="2">SPPR</td>
<td colspan="4" rowspan="2">SPR</td>
</tr>
<tr>
<td class="trd1c">W</td>
</tr>
<tr class="trd1r">
<td class="trd1c">Reset</td><td>0</td><td>0</td><td>0</td><td>0</td><td>0</td><td>0</td><td>0</td><td>0</td>
</tr>
</table>
        
</div>
<table class="regtbl2"><tr><td class="trowtit" colspan="2">Address</td><td colspan="2">0x40077001</td></tr>
<tr class="trowtit"><td  class="trowtit" colspan="2">Initial value</td><td colspan="2">0x00000024</td></tr>
<tr class="trowtit"><td  class="trowtit" colspan="2">After-reset value</td><td colspan="2">0x00000000</td></tr>
<tr><td class="ttitle2">Bit</td><td class="ttitle2">Field</td><td class="ttitle2">Value</td><td class="ttitle2">Description</td></tr>
<tr><td>4 - 6</td><td>SPPR</td><td>0x00</td><td>SPI baud rate prescale divisor</td>
<tr><td>0 - 3</td><td>SPR</td><td>0x00</td><td>SPI baud rate divisor</td>
</tr></table>
<div class="reghdr1">SPI1_CI</div>
<div class="regdiag">
<table class="regtbl">
<tr class="trd1r">
<td class="trd1c">Bit</td><td>7</td><td>6</td><td>5</td><td>4</td><td>3</td><td>2</td><td>1</td><td>0</td>
</tr>
<tr>
<td class="trd1c">R</td><td colspan="1" rowspan="1">TXFERR</td><td colspan="1" rowspan="1">RXFERR</td>
<td colspan="1" rowspan="1">TXFOF</td><td colspan="1" rowspan="1">RXFOF</td><td colspan="1"></td><td colspan="1"></td>
<td colspan="1"></td><td colspan="1"></td>
</tr>
<tr>
<td class="trd1c">W</td>
<td colspan="1"></td><td colspan="1"></td><td colspan="1"></td><td colspan="1"></td><td colspan="1">TNEAREFCI</td>
<td colspan="1">RNFULLFCI</td><td colspan="1">SPTEFCI</td><td colspan="1">SPRFCI</td>
</tr>
<tr class="trd1r">
<td class="trd1c">Reset</td><td>0</td><td>0</td><td>0</td><td>0</td><td>0</td><td>0</td><td>0</td><td>0</td>
</tr>
</table>
        
</div>
<table class="regtbl2"><tr><td class="trowtit" colspan="2">Address</td><td colspan="2">0x4007700A</td></tr>
<tr class="trowtit"><td  class="trowtit" colspan="2">Initial value</td><td colspan="2">0x0000000F</td></tr>
<tr class="trowtit"><td  class="trowtit" colspan="2">After-reset value</td><td colspan="2">0x00000000</td></tr>
<tr><td class="ttitle2">Bit</td><td class="ttitle2">Field</td><td class="ttitle2">Value</td><td class="ttitle2">Description</td></tr>
<tr><td>7</td><td>TXFERR</td><td>0x00</td><td>Transmit FIFO error flag</td>
<tr><td>6</td><td>RXFERR</td><td>0x00</td><td>Receive FIFO error flag</td>
<tr><td>5</td><td>TXFOF</td><td>0x00</td><td>Transmit FIFO overflow flag</td>
<tr><td>4</td><td>RXFOF</td><td>0x00</td><td>Receive FIFO overflow flag</td>
<tr><td>3</td><td>TNEAREFCI</td><td>0x01</td><td>Transmit FIFO nearly empty flag clear interrupt</td>
<tr><td>2</td><td>RNFULLFCI</td><td>0x01</td><td>Receive FIFO nearly full flag clear interrupt</td>
<tr><td>1</td><td>SPTEFCI</td><td>0x01</td><td>Transmit FIFO empty flag clear interrupt</td>
<tr><td>0</td><td>SPRFCI</td><td>0x01</td><td>Receive FIFO full flag clear interrupt</td>
</tr></table>
*/
/*!
\page SM1_settings Component Settings
\code
**          Component name                                 : SM1
**          Device                                         : SPI1
**          Interrupt service/event                        : Disabled
**          Settings                                       : 
**            Input pin                                    : Enabled
**              Pin                                        : PTD7/SPI1_MISO/UART0_TX/SPI1_MOSI
**              Pin signal                                 : 
**            Output pin                                   : Enabled
**              Pin                                        : PTE1/SPI1_MOSI/UART1_RX/SPI1_MISO/I2C1_SCL
**              Pin signal                                 : 
**            Clock pin                                    : 
**              Pin                                        : ADC0_SE6b/PTD5/SPI1_SCK/UART2_TX/TPM0_CH5
**              Pin signal                                 : 
**            Chip select list                             : 0
**            Attribute set list                           : 1
**              Attribute set 0                            : 
**                Width                                    : 8 bits
**                MSB first                                : yes
**                Clock polarity                           : Low
**                Clock phase                              : Capture on leading edge
**                Parity                                   : None
**                Chip select toggling                     : yes
**                Clock rate index                         : 0
**            Clock rate                                   : 2 µs
**            HW input buffer size                         : 1
**            HW input watermark                           : 1
**            Receiver DMA                                 : Disabled
**            HW output buffer size                        : 1
**            HW output watermark                          : 1
**            Transmitter DMA                              : Disabled
**          Initialization                                 : 
**            Initial chip select                          : 0
**            Initial attribute set                        : 0
**            Enabled in init. code                        : yes
**            Auto initialization                          : no
**            Event mask                                   : 
**              OnBlockSent                                : Enabled
**              OnBlockReceived                            : Enabled
**              OnError                                    : Disabled
**          CPU clock/configuration selection              : 
**            Clock configuration 0                        : This component enabled
**            Clock configuration 1                        : This component disabled
**            Clock configuration 2                        : This component disabled
**            Clock configuration 3                        : This component disabled
**            Clock configuration 4                        : This component disabled
**            Clock configuration 5                        : This component disabled
**            Clock configuration 6                        : This component disabled
**            Clock configuration 7                        : This component disabled
\endcode
*/
